Sample preparation method and sample preparation equipment for chip failure analysis

A sample preparation and failure analysis technology, which is applied in the field of semiconductors, can solve the problems of low efficiency of failure analysis and time-consuming point needles, etc., and achieve the effect of improving the efficiency of failure analysis

Active Publication Date: 2022-04-05
GIGA FORCE ELECTRONICS CO LTD +1
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  • Claims
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Problems solved by technology

[0004] However, the conventional point needle operation, that is, using a probe to detect the cross section of the aluminum pad or wire, can measure up to 8 points at one time. Needle operation is time-consuming, resulting in low efficiency of failure analysis

Method used

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  • Sample preparation method and sample preparation equipment for chip failure analysis
  • Sample preparation method and sample preparation equipment for chip failure analysis
  • Sample preparation method and sample preparation equipment for chip failure analysis

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Embodiment Construction

[0033] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all of them. Based on the embodiments of the present application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present application.

[0034] figure 1 It is a schematic flowchart of a sample preparation method for chip failure analysis provided in the embodiment of the present application. Such as figure 1 As shown, the method may include:

[0035] Step S110 , removing the backside of the chip to be processed until a processed chip is obtained that exposes the backside of the bare chip in the chip to be processed and the section of the lead wire wrapped in the package.

[0036] Suc...

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Abstract

The invention provides a sample preparation method and sample preparation equipment for chip failure analysis. The method comprises the following steps of: removing the back surface of a chip to be processed until a processed chip exposing the back surface of a bare chip in the chip to be processed and the cross section of a chip lead is obtained, and fixing the front surface of the processed chip on a fixing plate; and electrically connecting the cross section of the chip lead with the analysis circuit board through the target wire by adopting a preset wire welding machine based on the configured wire welding debugging parameters. According to the method, the defect that failure analysis of multi-welding-spot power-up cannot be carried out on the failure chip in the prior art is overcome, and meanwhile, the failure analysis efficiency is improved.

Description

technical field [0001] The present application relates to the field of semiconductor technology, in particular, to a sample preparation method and sample preparation equipment for chip failure analysis. Background technique [0002] Generally speaking, the failure of integrated circuits is inevitable in the process of development, production and use. With the continuous improvement of people's requirements for product quality and reliability, failure analysis is becoming more and more important. Through chip failure analysis, it can help IC designers find design defects, mismatch of process parameters, or design and operation Inappropriate and other issues. [0003] In the process of failure analysis, it is often necessary to observe and analyze the internal structural circuit of a certain layer or layers fixed in the chip. With the continuous improvement of the manufacturing process, the minimum size of the packaged chip in the product is continuously reduced, the area of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28G01N1/28
Inventor 何桂港郑朝晖
Owner GIGA FORCE ELECTRONICS CO LTD
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