Sample preparation method and sample preparation equipment for chip failure analysis

A sample preparation and failure analysis technology, which is applied in the field of semiconductors, can solve the problems of low efficiency of failure analysis and time-consuming point needles, etc., and achieve the effect of improving the efficiency of failure analysis
CN114280451AActive Publication Date: 2022-04-05GIGA FORCE ELECTRONICS CO LTD +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
GIGA FORCE ELECTRONICS CO LTD
Publication Date
2022-04-05

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Abstract

The invention provides a sample preparation method and sample preparation equipment for chip failure analysis. The method comprises the following steps of: removing the back surface of a chip to be processed until a processed chip exposing the back surface of a bare chip in the chip to be processed and the cross section of a chip lead is obtained, and fixing the front surface of the processed chip on a fixing plate; and electrically connecting the cross section of the chip lead with the analysis circuit board through the target wire by adopting a preset wire welding machine based on the configured wire welding debugging parameters. According to the method, the defect that failure analysis of multi-welding-spot power-up cannot be carried out on the failure chip in the prior art is overcome, and meanwhile, the failure analysis efficiency is improved.
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Description

technical field

[0001] The present application relates to the field of semiconductor technology, in particular, to a sample preparation method and sample preparation equipment for chip failure analysis. Background technique

[0002] Generally speaking, the failure of integrated circuits is inevitable in the process of development, production and use. With the continuous improvement of people's requirements for product quality and reliability, failure analysis is becoming more and more important. Through chip failure analysis, it can help IC designers find design defects, mismatch of process parameters, or design and operation Inappropriate and other issues.

[0003] In the process of failure analysis, it is often necessary to observe and analyze the internal structural circuit of a certain layer or layers fixed in the chip. With the continuous improvement of the manufacturing process, the minimum size of the packaged chip in the product is continuously reduced, the area of...

Claims

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