Chip testing method and system

Abstract

The invention provides a chip testing method and system, the system is composed of a server, a switch and at least one testing machine connected with the server through the switch, and the method comprises the following steps: obtaining product parameters of a to-be-tested chip on the testing machine through the testing machine; identifying a first version number corresponding to the test machine, and judging whether the first version number is consistent with the product parameters or not; if not, obtaining and updating a product configuration file and / or a second test case from a corresponding storage area of the server according to the product parameters; executing a test process on the to-be-tested chip according to the updated second test case; and if yes, executing the test process according to the first test case corresponding to the first version number. According to the invention, the corresponding test case can be obtained from the server for updating through the test machine according to the test requirement of the current chip, so that a plurality of series of products can share the test machine efficiently, accurately and simply.

Description

technical field [0001] The invention relates to the technical field of chip testing, in particular to a chip testing method and system. Background technique [0002] In the current chip production process, the chip SLT test (system level test, that is, system level test) is an important part of the chip test. The general test method of the SLT test is to install the packaged chip on the test board and start the dedicated SLT test. Software or conventional system software, etc., record the test results. Since the SLT test can effectively improve the yield rate of the chip from the factory, the SLT test is the last link to determine whether the chip is qualified. [0003] as attached figure 1 As shown, the basic architecture of the existing SLT test system generally uses a server and multiple machines controlled by a switch for testing. It belongs to the commonly used C / S architecture, and each machine independently tests the chip under the control of the server. , each mac...

AI Technical Summary

Problems solved by technology

[0009] Low efficiency, it takes hours to change and test products each time

[0010] Poor security, unable to check each machine program, manual operation is prone to errors

[0011] Poor flexibility, unable to switch products at any time, which has a great impact on product shipments

[0012] Therefore, due to the above-mentioned scenarios and problems in the existing technology, the efficiency, reliability and safety performance of SLT testing of chip products are seriously hindered, and the iteration cycle of chip products is also prolonged.

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