Three-dimensional memory and preparation method thereof

Abstract

The invention relates to a three-dimensional memory and a preparation method thereof. The method comprises the following steps of: forming an etching stop layer and a sacrificial layer which are adjacent to each other in a direction parallel to the substrate on the substrate; forming a laminated structure on the etching stop layer and the sacrificial layer; forming a channel structure penetrating through the laminated structure to the sacrificial layer; removing the substrate and the sacrificial layer to expose an end portion of the channel structure; removing a portion of the functional layer of the channel structure to expose a channel layer of the channel structure; and forming a lead-out structure in contact with the channel layer. According to the preparation method of the three-dimensional memory, the problem of electric leakage caused by etching of the virtual channel in the preparation process can be avoided, and the electrical performance and the product yield of the three-dimensional memory are improved.

Description

technical field [0001] The present disclosure relates to the field of semiconductor design and manufacturing, and more specifically, to the structure of a three-dimensional memory and its manufacturing method. Background technique [0002] The core area of ​​the three-dimensional memory may be composed of a stacked structure including multiple gate layers and multiple dielectric layers, and a channel structure passing through the stacked structure. The portion of the channel structure corresponding to the gate layer and the corresponding gate layer can form a memory cell. Some gate layers of the stacked structure can be used as control gates for controlling the memory cells to realize the memory function. [0003] As the requirements for storage density continue to increase, the number of layers in the stacked structure continues to increase, and the structure of the three-dimensional memory becomes more and more complex. Processes such as the formation of step structures ...

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Problems solved by technology

[0003] As the requirements for storage density continue to increase, the number of layers in the stacked structure continues to increase, and the structure of the three-dimensional memory is becoming more and more complex.

Processes such as the formation of step structures in 3D memory, the etching of channel holes and gate line gaps face corresponding challenges

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