Logic IP core for expanding parallel interface
A logic and interface technology used in the field of embedded systems
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[0016] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.
[0017] A logic IP core used to expand the parallel interface of the domestic Feiteng processor (FT-2000 / 4), read the shift-in register and shift-out register in the logic IP through the SPI interface of the domestic Feiteng processor (FT-2000 / 4) Write and corresponding timing control to realize the conversion between SPI interface and Local Bus interface;
[0018] Through the SPI interface of the domestic Feiteng processor (FT-2000 / 4), the command shift-in register and the data shift-out register are controlled. The first operation realizes the transmission of the write command and address, and the second operation realizes the transmission of the written data. , to complete the writing operation of the Local Bus interface device and the interface logic IP based on the Local Bus;
[0019] Through the SPI interface of the domestic Feiteng processor (FT-...
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