Low-power-consumption large-slew-rate low-distortion output stage circuit
An output stage circuit, high slew rate technology, applied in the direction of improving amplifiers to reduce nonlinear distortion, negative feedback circuit layout, etc., to achieve the effects of low quiescent current, low power consumption, and large slew rate
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[0103] Such as Figure 5 Shown, embodiment of the present invention is as follows:
[0104] In the layout of the integrated circuit, the input units P1, N1, and the output units P2, N2, R1, R2 are divided into several equal groups, and each group is correspondingly connected.
[0105] N3 and P3 respectively sample the current of one of N2 and P2, and the sampled current is sent to R3 and R4 respectively to increase the current of P4 and N4 when outputting a large current.
[0106] Taking the base of P4 as the disconnection point of the AC loop, the loop gain is
[0107] GH=g mP4 beta N2 K N3N2 R3
[0108] Taking the base of N4 as the disconnection point of the AC loop, the loop gain is
[0109] GL=g mN4 beta P2 K P3P2 R4
[0110] where g mP4 is the transconductance of P4, g mN4 is the transconductance of N4, β N2 is the current gain of N2 in the case of high current, β P2 It is the current gain of P2 in the case of high current. By parameter adjustment, both GH ...
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