Control circuit of power converter

Abstract

A control circuit of a power converter comprises a sensing circuit, a ramp signal generating circuit and a pulse width modulation circuit. The sensing circuit is coupled to the output circuit to provide a sensing current. The ramp signal generation circuit includes a transient circuit and a signal generation circuit. The transient circuit is coupled between the sensing circuit and the signal generating circuit to receive the sensing current and generate a variable reference voltage. The signal generating circuit provides a ramp signal according to a variable reference voltage. The pulse width modulation circuit is coupled to the ramp signal generating circuit and the output circuit, and provides a pulse width modulation signal to the output circuit according to the ramp signal. When load pumping occurs, load pumping lasts for a first preset time, a transient state exists during load pumping, the transient state lasts for a second preset time, the second preset time is shorter than the first preset time, and the variable reference voltage provided by the transient circuit in the second preset time is changed from a preset value to an adjustment value. The transient circuit recovers the variable reference voltage to a preset value after a second preset time. According to the invention, the degree of freedom of circuit design can be improved and stable output can be provided.

Description

technical field [0001] The present invention relates to a power converter, in particular to a control circuit of the power converter. Background technique [0002] like figure 1 shown, figure 1 As a power converter, the system utilizes the output voltage VOUT for voltage feedback control and the output current VOUT for current feedback control. In the part of voltage feedback control, the error amplifier EA and the compensation circuit COM generate the compensation signal COMP according to the output voltage VOUT and the reference voltage VREF. In the part of current feedback control, the system will add the information of the total output current IL summed by the output currents IL1 and IL2 of each phase to the ramp signal RAMP to change the waveform of the ramp signal RAMP. In addition, the comparator CP compares the compensation signal COMP with the ramp signal COMP, thereby generating a pulse width modulation signal PWM, and controlling the output circuit OS to conver...

AI Technical Summary

Problems solved by technology

[0004] However, due to the limitation of the headroom (headroom, the voltage difference between the working voltage VCC and the ground), the disadvantage of the above technique is that the ramp signal RAMP will be increased with the pumping degree of the output current IL, and the ramp signal RAMP will be increased from time t1 to time t5 During the pumping period, it will remain in a raised state. Once the pumping load is too heavy, the position of the ramp signal RAMP will be limited by the operating voltage VCC and reach the upper limit, resulting in the limited pumping and no further increase.

From the above, it can be seen that the circuit design of the prior art is limited by the margin, which leads to the limitation of the output capability of the system to cope with the pumping

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