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Avionics system low-delay bus test verification platform

A bus test and verification platform technology, applied in the direction of electrical components, error detection/correction, electrical digital data processing, etc., can solve the problem of large size of low-latency bus test verification platform, chaotic layout of aviation connector digital test function boards, Take up a lot of space and other problems, to achieve the effect of solving data congestion, saving space, and solving data loss

Inactive Publication Date: 2022-05-31
北京中科飞鸿科技股份有限公司
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  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In the process of implementing this application, the inventors found that there are at least the following problems in the related art: in order to improve the ability of system low-latency bus network function verification and index testing, aviation connector digital test function boards are usually provided with multiple, but multiple The layout of digital test function boards of aviation connectors is chaotic and takes up a lot of space, which makes the low-latency bus test verification platform of avionics system larger in size

Method used

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Experimental program
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Embodiment approach

[0066] refer to figure 1 , Figure 6 , as an implementation of the controller, the controller is configured as:

[0067] Acquiring temperature information of each preset area in the housing 1; wherein, the preset area is obtained by dividing the housing 1 according to the area, and the temperature information of each preset area is collected by the temperature sensor 28 installed in each preset area;

[0068] Determine whether the temperature information of each preset area is greater than the preset temperature threshold, and if so, control the cooling fan 27 to open;

[0069] Wherein, the preset temperature threshold can be preset according to historical experience or actual conditions.

[0070] In the above embodiment, the interior of the housing 1 is divided into multiple preset areas, and the temperature of each preset area in the housing 1 is obtained and the temperature is lowered in time, thereby reducing the damage caused by the long-term operation of the digital test...

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Abstract

The invention relates to an avionics system low-delay bus test verification platform, and belongs to the technical field of aerospace bus testing, the avionics system low-delay bus test verification platform comprises a shell, a plurality of aviation connector digital test function boards arranged in the shell and a test bottom plate connecting seat, and the test bottom plate connecting seat is used for installing the aviation connector digital test function boards; the test bottom plate connecting seat comprises a first mounting rack and a second mounting rack which are used for mounting an aviation connector digital test function plate, the first mounting rack and the second mounting rack are sequentially arranged in the vertical direction, and locking assemblies are arranged on the first mounting rack and the second mounting rack. The locking assembly is used for fixing the aviation connector digital test function board. The test base plate connecting seat is arranged to be of a double-layer structure, and the aviation connector digital test function board is fixed on the test base plate connecting seat, so that space is effectively saved, and miniaturization of the avionics system low-delay bus test verification platform is facilitated.

Description

technical field [0001] The present application relates to the technical field of aerospace bus testing, in particular to a low-latency bus testing verification platform for avionics systems. Background technique [0002] The airborne avionics system mainly includes communication, navigation, display, cockpit entertainment and other equipment, which is used to complete the communication, navigation, information processing and control between the aircraft and the ground. It is the core and most important equipment of the aircraft and can directly affect the advanced degree and comprehensive ability. [0003] Among them, the low-latency bus test and verification environment is mainly a test and research platform supporting the system bus in the avionics system, which can provide low-latency data simulation sources, has network test functions, and realizes a simulation environment based on low-latency bus functions. By installing a special type of aviation connector digital tes...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22H05K7/20
CPCG06F11/221H05K7/20136Y02D10/00
Inventor 李学亮
Owner 北京中科飞鸿科技股份有限公司
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