Semiconductor structure and manufacturing method of semiconductor structure

Abstract

The invention provides a semiconductor structure and a manufacturing method of the semiconductor structure, and relates to the technical field of semiconductors, the semiconductor structure comprises a substrate, and the substrate comprises a storage array region and a peripheral circuit region arranged around the storage array region; the plurality of embedded bit lines are arranged in the storage array area of the substrate; the at least one embedded gate is disposed in the peripheral circuit region of the substrate. According to the invention, the plurality of bit lines arranged in the storage array region of the substrate are embedded bit lines, the bit lines are integrally located in the substrate, and the substrate supports the bit lines, so that the bit lines can be effectively prevented from toppling over. Meanwhile, the embedded gate is arranged in the peripheral circuit region of the substrate, the gate is arranged in the substrate in an embedded manner, and the channel length of the gate comprises the sum of the length of the bottom surface, in contact with the substrate, of the gate and the length of the two side walls, so that the channel length of the gate is increased, and the control capability of the gate on the channel is further improved.

Description

technical field [0001] The present disclosure relates to the field of semiconductor technology, and in particular, to a semiconductor structure and a method for fabricating the semiconductor structure. Background technique [0002] At present, the memory array area and the peripheral circuit area of ​​the semiconductor structure belong to different processes, and the process of the semiconductor structure is complicated and time-consuming. Moreover, with the improvement of the integration degree of the semiconductor structure, the feature size of the semiconductor device is continuously reduced, and the process of the memory array area and the peripheral circuit area of ​​the semiconductor structure is faced with greater challenges. SUMMARY OF THE INVENTION [0003] The following is an overview of the subject matter detailed in this disclosure. This summary is not intended to limit the scope of protection of the claims. [0004] The present disclosure provides a semicond...

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Problems solved by technology

[0002] At present, the memory array area and the peripheral circuit area of ​​the semiconductor structure belong to different processes, and the process of the semiconductor structure is complicated and the process takes a long time.

Moreover, with the improvement of the integration level of semiconductor structures and the continuous shrinking of the feature size of semiconductor devices, the process of the memory array area and peripheral circuit area of ​​the semiconductor structure is facing greater challenges.

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