Semiconductor package and making method thereof

Abstract

A semiconductor package in which solder balls can be loaded on an encapsulated resin to reduce the package area and a method for producing the semiconductor package. An apparatus for carrying out the method includes a first insulating substrate 5 carrying a mounting portion 3 for mounting a semiconductor device 2 and a first electrically conductive pattern 4 electrically connected to the semiconductor device 2 , a sidewall section 6 formed upright around the mounting portion of the first insulating substrate, a cavity 7 defined by the first insulating substrate 5 and the sidewall section and encapsulated by an encapsulating resin 12 as the semiconductor device 2 is mounted on the mounting portion 3 and a second insulating substrate 10 provided in the cavity 7 and on the sidewall section 6 and carrying a second electrically conductive pattern 31 electrically connected to the first electrically conductive pattern 4 via plated through-holes 26 formed in the sidewall section 6 . A solder land 9 is provided in a lattice on one entire surface of the second insulating substrate 10.

Description

technical field [0001] The present invention relates to a semiconductor package and a method of manufacturing the same. Background technique [0002] Hitherto, as a semiconductor package, there is an area array BGA (Ball Grid Array) 70 for surface mount LSI (Large Scale Integration), including solder ball terminals on its mounting surface with a printed circuit board, such as figure 1 shown. [0003] This BGA 70 includes a semiconductor device 73 which includes a first insulating substrate 72 and is mounted on the first insulating substrate 72, and a second insulating substrate 75 which is laminated on the first insulating substrate 72 via a prepreg 74. on, such as figure 1 shown. [0004] The first insulating substrate 72 is a copper-lined laminate composed of, for example, glass cloth and copper foil as a base, the glass cloth is impregnated with epoxy resin, and copper foil is bonded on both sides thereof. Form into a rectangular shape. The first insulating substrate...

AI Technical Summary

Problems solved by technology

However, in the area of ​​the cavity 82 for coating the sealing resin 86 and the area of ​​the second insulating substrate 75 in the package, the solder ball 92 and the conductor pattern may be arranged only on the upper end of the second insulating substrate 75, and cannot be arranged on the upper end of the second insulating substrate 75. cavity 82, thereby increasing the package area

[0010] Also, since the function of solder balls and conductor patterns provides electrical connection between the semiconductor package and the main board, there is a limit to reducing the mounting area, making it difficult to reduce the package size

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