Reliable frame synchronizing method in data communication
A data communication and frame synchronization technology, applied in the field of electrical communication, can solve the problems of difficult acquisition and frame synchronization methods, and achieve the effects of large fault tolerance, simple circuit, and easy modification and upgrade.
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[0025] The serial-to-parallel conversion is performed at the receiving end, and the data after the serial-to-parallel conversion enters the frame synchronization judgment module. When the receiver receives a byte, it sends the hardware to the frame synchronization judgment module for processing, and searches for frame synchronization. The frame synchronization algorithm of the receiver is described as follows:
[0026] (1). Define a shift register K with a length of m bytes. K can be regarded as an m×8 matrix, each row is composed of a byte, and each column is composed of the same bits of m bytes. Initialize the shift register with all 0s. In addition, a data receiving register R is set, which has a total of 8 bits and an initial value of 0. which is,
[0027] K=[0], R=0 see Fig. 3, Fig. 4, Fig. 5.
[0028] (2). Every time a byte is received, put it into K bit by bit from the first row and first column of the matrix.
[0029] (3). Calculate the sum Z of each column...
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