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Chip semiconductor device mixed formed with store and logic circuit and producing method thereof

A semiconductor and memory technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of increased H2O emission, difficulty in taking account of transistor reliability, DRAM area data retention characteristics, and high hygroscopicity

Inactive Publication Date: 2007-01-31
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The second reason is that due to the high hygroscopicity of low-k materials, after the low-k film is formed, H 2 The amount of O released increases
Therefore, it is difficult to balance the reliability of the transistors in the logic area and the data retention characteristics of the DRAM area

Method used

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  • Chip semiconductor device mixed formed with store and logic circuit and producing method thereof
  • Chip semiconductor device mixed formed with store and logic circuit and producing method thereof
  • Chip semiconductor device mixed formed with store and logic circuit and producing method thereof

Examples

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Embodiment Construction

[0035] Embodiments of the present invention will be described below with reference to the drawings.

[0036] first embodiment

[0037] figure 1 Shown is a schematic cross-sectional structure of the semiconductor device according to the first embodiment of the present invention.

[0038] Such asfigure 1 As shown, in a semiconductor device in which a logic circuit and a DRAM are mixed, the structure of the insulating film layer immediately below the multilayer wiring layer ML is different between the logic region and the DRAM region. That is, the transistor T1 is formed in the element formation layer 1 of the logic region, and the memory cell MC composed of a MOS transistor T2 and, for example, a channel capacitance TC is formed in the element formation layer 2 of the DRAM region. These element formation layers 1 and 2 are, for example, a semiconductor substrate or a potential well. In the DRAM region, a CVD insulating film 3 such as a BPSG or PSG film having excellent covera...

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PUM

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Abstract

A semiconductor substrate has a logic region and a memory region. A multilayer wiring layer is formed on the logic region and the memory region. A diffusion preventing film is formed at least between the multilayer wiring layer in the logic region and the element forming layer in the logic region for the purpose of preventing H2O from diffusing into the logic region.

Description

[0001] Referenced related applications [0002] This application is based on the prior Japanese Patent Application No. 2002-127353 (April 26, 2002), the entire contents of which are referred to herein. technical field [0003] The present invention relates to a semiconductor device in which at least a memory and a logic circuit are mixed and formed in a single chip, and a method for manufacturing the same. Background technique [0004] High-performance logic devices such as CPUs and semiconductor devices such as high-speed SRAMs must suppress delays in transmission signals in order to operate at high speeds. Therefore, it is best to use multilayer wiring to reduce wiring resistance, or use Cu (copper) that can achieve low resistance as the wiring material. In addition, as an insulating film that insulates between multilayer wiring, it is necessary to use a relatively Dielectric constant (k) lower than SiO 2 The material of the membrane. [0005] As such a low dielectric c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/04H01L21/822H01L21/768H01L21/8234H01L23/00H01L23/522H01L23/532H01L27/088H01L27/10
CPCH01L23/53295H01L2924/0002H01L23/53238H01L23/564H01L2924/00H10B99/00
Inventor 梶田明广
Owner KK TOSHIBA
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