Method and device for realizing main backup of clock in synchronizing system

Abstract

A device implementing the main and backup clock in synchronism system includes the circuit for reversing the main to the backup. The reversing circuit includes the circuit for locking the main, the circuit for removing the main, the circuit for generating the reversing signal, the reversed signal output processor. The invention can either avoid the state of which the two boards are as the main at same time, also can eliminate the phase oscillation at state of the main, meanwhile can reduce the time delay for reversing the main to the backup.

Description

Technical field [0001] The invention relates to a method and a device for switching between main and standby, in particular to a method and device for realizing main standby (hot backup) and hot switching of a synchronized clock in a synchronization system in the communication field. Background technique [0002] The main-standby redundancy design has been widely used in communication system equipment, especially the hot backup function it realizes has greatly improved the reliability and stability of the equipment. In a synchronization system in the communication field, all single boards or sub-systems work under their synchronized clocks. Therefore, as the core of the synchronization system, the reliability of the clock board is particularly important. Therefore, the clock board must be switched between active and standby. [0003] At present, in the synchronization system, the devices and methods for realizing clock master / slave switching are roughly in the ...

AI Technical Summary

Problems solved by technology

[0005] Due to reasons such as phase resolution and phase randomness, the phase difference between the active and standby clock boards may be any value within the half cycle of the voltage-controlled oscillator (VCO) output frequency. The phases of the main and standby clock boards are continuous, and the phases of the output clocks of the main and standby clock boards are inconsistent. For example, if a 16.384MHZ VCO is used in the program-controlled switch system, the phase difference between the output clocks of the main and standby clock boards is roughly between 0 and 30ns. If the main and standby clock boards are switched, There will be a change in the clock duty cycle of one clock cycle, so the phase discontinuity occurs. Even if the master-standby seamless switch can be achieved, that is, there is no time interval between the main output being turned off and the standby output being turned on, it cannot be prevented. The occurrence of the above-mentioned phase discontinuity causes delay in the implementation process of active / standby switchover

[0006] 2. Use the method of long and short pins to realize the main and standby switching. The disadvantage of this method is that it needs the cooperation of connectors;

Since the switchover can only be done through a single board, the active / standby selection can only be made through the operation of this board. If the board fails, the active / standby switchover cannot be completed. Therefore, the device does not achieve real hot switching

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