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Reference voltage circuit and electronic device

A reference voltage and circuit technology, applied in the field of semiconductor devices

Inactive Publication Date: 2010-04-28
SII SEMICONDUCTOR CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Thus, this becomes a problem when high precision matching of the voltages at the output terminals 110 and 111 of the two reference voltage circuits is required

Method used

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  • Reference voltage circuit and electronic device
  • Reference voltage circuit and electronic device
  • Reference voltage circuit and electronic device

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] figure 1 is a circuit diagram of the reference voltage circuit of the present invention. Below, will combine figure 1 Embodiments of the present invention are described.

[0023] The source of the depletion MOS transistor 1 and the drain of the enhancement MOS transistor 2 having the same conductivity type are connected in series with each other. The gate and source of the depletion MOS transistor 1 are connected to each other. The gate and drain of the enhancement MOS transistor 2 are connected to each other. The drain of the depletion MOS transistor 1 is connected in series to the source of the depletion MOS transistor 3 .

[0024] To output the same voltage, use the same structure. In other words, the source of the depletion MOS transistor 4 and the drain of the enhancement MOS transistor 5 having the same conductivity type are connected in series with each other. The gate and source of the depletion MOS transistor 4 are connected to each other. The gate and...

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Abstract

A reference voltage circuit is provided in which a difference of voltages applied to reference voltage circuits is reduced so that a difference of respective output voltages is made small. Depletion type MOS transistors (3, 6) are respectively connected in series with the drains of depletion type MOS transistors (1, 4) in two ED type reference voltage circuits. The gate of one of the series-connected depletion type MOS transistors (3, 6) is connected with the source of the other MOS transistor and the gate of the other MOS transistor is connected with the source of the one MOS transistor. Thus, a difference of voltages applied to the respective ED type reference voltage circuits is reduced so that a difference of respective output voltages is made small.

Description

technical field [0001] The present invention relates to a semiconductor device for outputting a constant reference voltage. Background technique [0002] so far, figure 2 The circuit shown is used as a reference voltage circuit that can obtain a stable output voltage regardless of variations in power supply voltage and temperature (for example, see JP 04-065546 B (pages 6 and 7, and figure 2 )). [0003] Regarding the structure of this circuit, the source of the depletion MOS transistor 1 and the drain of the enhancement MOS transistor 2 of the same conductivity type are connected in series with each other. The source and gate of the depletion mode MOS transistor 1 are connected to each other. The drain and gate of the enhancement MOS transistor 2 are connected to each other. The high voltage supply terminal 100 is connected to the drain of the depletion mode MOS transistor 1 . The low voltage supply terminal 101 is connected to the source of the enhancement MOS transis...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F3/02H01L27/02G05F3/24H03K19/094
CPCG05F3/24G11C11/40
Inventor 中下贵雄福井厚夫
Owner SII SEMICONDUCTOR CORP