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Semiconductor device

A semiconductor and raised electrode technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the difficulty of reducing costs, the difficulty of narrowing the pitch of inner leads, and the inability to realize the size of semiconductor chips Minification and other issues

Inactive Publication Date: 2004-06-23
SHARP KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, if the COF shown in FIG. 11(b) is used, if the width of the bump electrodes 17a, 17b is reduced, the bonding accuracy of the inner leads 12a, 12b must be improved. With the current bonding accuracy, it is difficult for the inner leads to further narrow the pitch. change
[0015] Thus, with conventional COFs, there is a limit to narrowing the pitch, and there is a problem that it is difficult to achieve an inner lead pitch of 35 μm or less.
If the pitch of the inner leads cannot be narrowed, the size of the semiconductor chip cannot be reduced.
In addition, the yield of semiconductor chips in the wafer cannot be improved, and it is difficult to reduce the cost.

Method used

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Experimental program
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Embodiment approach 1

[0038] Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 to 4 .

[0039] In the COF (Chip On Film, semiconductor device) of this embodiment, as shown in FIG. The bump electrodes 98 are electrically connected to the inner leads 100 and the bump electrodes 98 .

[0040] On the inner leads 100 on the film substrate 101, a solder resist layer 94 is formed as a resist film made of a polyimide-based or polyurethane-based material. The solder resist 94 is provided to prevent problems such as corrosion of the inner lead 100 due to adhesion of conductive or ionic impurities, electric leakage, and the like. In addition, the above-mentioned solder protection layer 94 prevents the inner lead 100 from being disconnected due to external force, and protects the inner lead 100 when it is bent. Furthermore, the solder resist layer 94 is formed to have a thickness of 3 μm to 30 μm. In addition, in order to join the bump electrode 98 and the inner...

Embodiment approach 2

[0080] Next, another embodiment of the present invention will be described with reference to FIG. 5 . In addition, for convenience of explanation, the same reference numerals are assigned to the components having the same functions as those shown in the drawings of the first embodiment above, and their descriptions are omitted.

[0081] On the semiconductor chip 96 of this embodiment, as shown in FIG. 5( a ), the distance from the edge of the semiconductor chip 96 is varied, and bump electrodes formed at a predetermined pitch are formed in three rows. In the following, the distance from the edge of the semiconductor chip 96 to each bump electrode is relatively short, and described in order as the first bump electrode (edge ​​side bump electrode) 68a, the second bump electrode ( 1st inner side bump electrode) 68b, and 3rd bump electrode (2nd inner side bump electrode) 68c. In addition, when referring to any one or both of the first bump electrode 68 a, the second bump electrod...

Embodiment approach 3

[0099] Below, according to Figure 6 ~ Figure 7 Other embodiments of the present invention will be described. In addition, for convenience of explanation, the same reference numerals are attached to the components having the same functions as those shown in the illustrations of Embodiments 1 and 2 above, and description thereof will be omitted.

[0100] In the COF of this embodiment, a part of the inner peripheral side bump electrode 58b of the COF shown in FIG. The remaining bump electrodes 58b are on the inner peripheral side. Specifically, if Figure 6 As shown, the bump electrode 77 is arranged at a position beyond the distance from the end side of the semiconductor chip 96 of the inner peripheral side bump electrode 58b. In addition, the bump electrodes 77 are arranged in an arrangement direction different from that of the outer peripheral side bump electrodes 58a and the inner peripheral side bump electrodes 58b. That is, the two opposing sides of the bump electrode ...

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PUM

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Abstract

A semiconductor device of the present invention has two inner inner leads to be bonded with inner-side bump electrodes each placed at a position which is a relatively large distance apart from the edge of a semiconductor chip, between outer-side bump electrodes each placed at a position which is a relatively small distance apart from the edge of the semiconductor chip. At least one of the inner inner leads is bent in accordance with a bonding position with the inner-side bump electrode.

Description

technical field [0001] The present invention relates to a semiconductor device, and more particularly to a semiconductor device having narrow-pitched inner leads. Background technique [0002] As a package for liquid crystal excitation, a COF (Chip On Film) in which a semiconductor chip composed of LSI or the like is mounted on a film substrate is used. When COF is used, bump electrodes are provided at a predetermined arrangement pitch on the edge of the semiconductor chip. In addition, the bump electrodes are bonded to inner leads on the film substrate connecting the semiconductor chip and the film substrate. That is, as shown in FIG. 9( a ), bump electrodes 18 are provided on the semiconductor chip 16 , and the bump electrodes 18 are connected to inner leads 10 supported on a film substrate (not shown). As shown in FIG. 9( b ), the inner lead 10 is arranged linearly from the edge of the semiconductor chip 16 to the bump electrode 18 and bonded to the bump electrode 18 . ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/60H01L21/56H01L23/48H01L23/498
CPCH01L2224/73203H01L2924/01078H01L21/563H01L2924/01079H01L2224/73204H01L2224/16225H01L23/49838H01L2924/15173H01L2224/16H01L23/4985H01L2224/32225H01L2924/00014H01L2924/00H01L2224/0401H01L23/48
Inventor 丰沢健司
Owner SHARP KK