Multiplier calculating modular multiplicatin of large numbers
A large number analog multiplication and multiplier technology, which is applied in the field of large number analog multiplication calculation multipliers, can solve the problems of increased power consumption, high circuit power consumption, and large circuit area, achieving less increase in circuit area and low circuit power consumption , The effect of small circuit area
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[0043] The invention is an optimized hardware implementation scheme of the Montgomery algorithm. Compared with the original technical scheme, all operations of the original technical scheme are implemented by an adder, and the technical scheme of the present invention is implemented by a multiplier; the on-chip SRAM is used instead of the original technical scheme. Registers store operands and intermediate quantities in an operation.
[0044] In order to make the modular multiplication calculation of large numbers more convenient and reduce the use of hardware registers and hardware adders, for the Montgomery algorithm: when the integers A, B and N are given, calculate R=REDC(A, B, N, n), Satisfy the condition R*2 n =A*B mod N; the present invention has made the following improvements: let n=nn*Y, wherein nn is the binary bit number of N in units of Y bits; the modulo inverse N_INV[Y-1:0] satisfies the following conditions: N_INV[Y-1:0]*N[Y-1:0]mod 2 Y =-1. Y may be 1-128. ...
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