Method for operating a memory device

Abstract

A method and a system for operating bits of memory cells in a memory array, the method including applying a first operating pulse to a terminal of a first cell, the first operating pulse is intended to place the first cell into a predefined state; and applying a second operating pulse to a terminal of a second cell in the set, the second operating pulse is intended to place the second cell to the predefined state, and the pulse characteristics of the second operating pulse are a function of the response of the first cell to the first operating pulse.

Description

technical field [0001] The present invention relates to a method of operating memory cells of a non-volatile memory (NVM) array, such as programming and erasing, and in particular to a simplified method of pulsed operation of the above-mentioned array. Background technique [0002] Memory cells are used in various types of electronic devices and integrated circuits, such as, but not limited to, Erasable Programmable Read Only Memories (EPROMs), Electrically Erasable Programmable Read Only Memories (EEPROMs), and Flash EEPROMs. Memory cells are used in integrated circuits to store data and other information. [0003] Non-volatile memory (NVM) cells typically include electronic transistors with programmable threshold voltages. For example, a floating gate electronic transistor or split gate electronic transistor has a threshold voltage (Vt) that is programmed or erased by charging and discharging the floating gate between the electronic transistor control gate and the channel...

AI Technical Summary

Problems solved by technology

However, this approach may result in a substantial excess in the form of a large number of verify pulses (e.g., one for each reference), which time penalty is unfavorable; or may require complex parallel reference designs with such a chip area loss on

Images