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Optimized list label detecting point and method for optimizing it

A test point, surface mount technology, used in electronic circuit testing, measuring electricity, measuring devices, etc., can solve problems such as impedance discontinuity and signal quality influence

Inactive Publication Date: 2007-01-24
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0013] The invention provides an optimized surface-mounted test point and its optimization method to solve the problem in the prior art that impedance discontinuities are formed on the signal line after the surface-mounted test point is added, which negatively affects the signal quality

Method used

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  • Optimized list label detecting point and method for optimizing it
  • Optimized list label detecting point and method for optimizing it
  • Optimized list label detecting point and method for optimizing it

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Embodiment Construction

[0034] The basic principle of the present invention is to hollow out the adjacent plane part corresponding to the surface mount test point, increase the distance between the microstrip line and its adjacent plane, reduce the impedance change of the microstrip line caused by adding the surface mount test point, and achieve micro The purpose of optimizing the impedance of the strip line, thereby reducing the influence of the test point on the high-speed signal.

[0035] Describe in detail below in conjunction with accompanying drawing and specific embodiment:

[0036] The surface paste test point of optimization described in the present invention is as Figure 4 As shown, the first adjacent plane (reference plane) below the surface-mounted test point is a circular hollowed out part. At this time, the reference plane of the surface-mounted test point is the plane below the hollowed-out plane. The surface-mounted test point and The distance between adjacent planes (reference plan...

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Abstract

Overcoming shortage of current technique, the disclosed method uses technical scheme that distance between gage attached test point and adjacent plane is increased in order to increase impedance value of gage attached test point so as to cancel out reduction of impedance value of microstrip line caused by adding gage attached test point. Thus, when gage attached test point is added to system, test system reduces, even eliminate discontinuity of impedance value of microstrip line. The invention reduces influence on signal in high speed greatly when gage attached test point is added to system.

Description

technical field [0001] The invention relates to the technical field of single-board testing, in particular to a technology for optimizing surface-mounted test points of single-board testing. Background technique [0002] Testing the single board includes two parts, one is to test the connection reliability of the single board components, that is, ICT (In-Circuit test online test system) test. The other is to test the signal quality of the board. For these two tests, it is necessary to add test points on the single board to improve test efficiency. [0003] For the microstrip line on the surface of PCB (Printed Circuit Board printed circuit board), the simplest test point is the surface mount test point. Such as figure 1 As shown, the surface mount test points are generally circular and added directly on the microstrip line. In order to enable the test probe to effectively contact the surface mount test point, the surface mount test point is generally a disc whose diamete...

Claims

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Application Information

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IPC IPC(8): G01R31/28G01R31/00
Inventor 陈方勇王晓东
Owner HUAWEI TECH CO LTD