Method and system for accessing critical region

A critical area and priority mark technology, applied in the field of data communication, can solve problems such as unsatisfied

Inactive Publication Date: 2007-02-28
NEW H3C TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0021] It can be seen that when the CPU wants to read data from the critical section, if the critical section has a read lock, the reading process can still enter the critical section. If the critical section has a write lock, the reading process must wait until the write lock is released. To enter the critical area; when the CPU wants to write data to the critical area, no matter whether the critical area has a read lock or a write lock, it must wait until the read-write lock is completely released before the writing process can enter the critical area. Yes: When th

Method used

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  • Method and system for accessing critical region
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  • Method and system for accessing critical region

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Embodiment Construction

[0056] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0057] Fig. 3 is a flow chart of reading data from a critical section in a multi-core system provided by an embodiment of the present invention, as shown in Fig. 3 , the specific steps are as follows:

[0058] Step 301: Presetting a write priority flag bit for indicating whether there is currently a write process waiting to enter the critical section.

[0059] For example: for MIPS supporting Linux, the 14th bit of the read-write lock can be set as the write priority flag. When the write priority flag is 1, that is: when the value of the read-write lock is [0x4000, 0x7FFF], it means The writing process is waiting. If there is a reading process waiting at the same time, the writing process should enter the critical section first.

[0060] Or, besides the read-write lock, a write-priority flag bit can be set independently, and the valu...

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PUM

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Abstract

The invention relates to two methods for accessing critical areas, wherein it comprises: presetting the write priority identifier to instruct if there is write process waiting; when CPU is ready to write data into critical area, if present critical area has read lock and the write priority identifier instructs there is not write process waiting, setting the write priority identifier as there is write process waiting; when the read lock is released, setting the write priority identifier as there is no write process waiting, and entering into critical area; when CPU is ready to read out data from critical area, and if the write priority identifier detects write process waiting, the write process has priority. The invention discloses two systems that access critical area, which comprises: CPU, read-write lock module and write priority identifier memory module. The invention can on time response the write operation of critical area, to meet high real time property of write operation in multi-core system.

Description

technical field [0001] The invention relates to the technical field of data communication, in particular to a method and a system for accessing a critical area in a multi-core system. Background technique [0002] In a multi-core system, a spin lock (Spinlock) is used to realize the requirement of multiple central processing units (CPUs) to run concurrently and mutually exclusive access to critical resources. Read write lock (read write lock) is a deformation of spin lock, spin lock can only have one process at a time: the read process or write process enters the critical area, the operation of the critical area is a serial operation, and the read write lock In other words, the read process can be executed concurrently, but the write process is not allowed to execute concurrently. During the execution of the read process or the write process, the other process is not allowed to execute, that is: the read process and the write process cannot be executed at the same time. [...

Claims

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Application Information

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IPC IPC(8): G06F9/46
Inventor 龚一斌李建勋吴快快赵鲲鹏
Owner NEW H3C TECH CO LTD
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