Delay-locked loop system and interrelated method

Abstract

The invention discloses a delay-locked loop system and an interrelated method used for generating a recovered clock according to an input signal and a reference clock. The method comprises: generating a phase error signal for representing the phase error between the input signal and the recovered clock; generating a first correction signal based on the phase error signal by using an integral difference conversion method; generating a clock index and updating the clock index according to the first correction signal; delaying the reference clock to generate a plurality of delayed versions of the reference clock as a plurality of candidate clocks; and selecting one of the candidate clocks as the recovered clock based on the clock index.

Description

technical field [0001] The present invention relates to a delay-locked loop, in particular to a second-order delay-locked loop for clock and data recovery. Background technique [0002] When recovering the data transmitted by an input data signal, it is usually necessary to use a phase locking circuit to track the input data signal. If the clock frequency of the input data signal remains approximately constant, or only a small frequency deviation occurs due to noise, then a phase-locked loop (PLL) or a delay-locked loop (DLL) ) can be used to realize the phase locking circuit mentioned above. However, when the input data signal is a wide-band signal (spread-spectrum signal, such as a serial ATA signal), since the traditional delay-locked loop cannot track the wide-band signal, only a phase-locked loop can be used to implement the above-mentioned phase-locked circuit. . [0003] However, while phase-locked loops can be used to track many different signals, they come with s...

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Problems solved by technology

However, when the input data signal is a wide-band signal (spread-spectrum signal, such as a serial ATA signal), since the traditional delay-locked loop cannot track the wide-band signal, only a phase-locked loop can be used to implement the above-mentioned phase-locked circuit.

[0003] However, while PLLs can be used to track many different signals, they come with some potential problems

For example, a phase-locked loop generally occupies a larger circuit area in an integrated circuit, so its cost will be higher than that of a delay-locked loop

In addition, the phase-locked loop includes a voltage controlled oscillator (VCO), and the voltage-controlled oscillator often inevitably accumulates jitter, which leads to a lower noise immunity of the phase-locked loop. Noise Immunity of Delay Locked Loop

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