Semiconductor device with transparent link area for silicide applications and fabrication thereof

Abstract

Useful to inhibit reverse engineering, semiconductor devices and methods therefor include formation of two active regions over a substrate region in the semiconductor device. According to an example embodiment, a dopable link, or region, between two heavily doped regions can be doped to achieve a first polarity type, with the two heavily doped regions of the opposite polarity. If dictated by design requirements, the dopable region is adapted to conductively link the two heavily doped regions. A dielectric is formed over the dopable region and extends over a portion of each of the two heavily doped regions to inhibit silicide formation over edges of the dopable region. In connection with a salicide process, a silicide is then formed adjacent the dielectric and formed over another portion of the two heavily doped regions.

Description

RELATED PATENT DOCUMENTS[0001] This is a divisional of Serial No. 09 / 271,737, filed on Mar. 18, 1999 (VLSI.232PA), to which Applicant claims priority under 35 U.S.C. .sctn.120.[0002] The present invention relates generally to semiconductor devices and semiconductor manufacturing and, more particularly, to semiconductor devices using silicide processes generally and in connection with efforts to inhibit reverse engineering.[0003] The electronics industry continues to rely upon advances in semiconductor technology to realize higher-functioning devices in more compact areas. For many applications, realizing higher-functioning devices requires integrating a large number of electronic devices into a single silicon wafer. As the number of electronic devices per given area of the silicon wafer increases, the manufacturing process becomes more difficult.[0004] A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. Such silicon-ba...

AI Technical Summary

Benefits of technology

[0018] The present invention has been found to be particularly advantageous in applications where it is desirable to inhibit or prevent reverse-engineering efforts. While the present invention is not necessarily limited to this environment, an appreciation of various aspects of the invention is best gained through a discussion of example of such applications.

Problems solved by technology

As the number of electronic devices per given area of the silicon wafer increases, the manufacturing process becomes more difficult.

For many analytical techniques, including scanning-electron microscopy, linking and blocking connectivity between two active regions of the same polarity type, in the manner described above, appears identical and thereby undermines the typical reverse-engineering effort.

This approach is not readily achievable for all circuit architectures, particularly those involving salicide processes.

In a salicide process, siliciding two heavily doped regions of the same polarity normally results in silicide forming over the portion of the substrate area between the two adjacent regions which, in turn, results in shorting the two heavily doped regions.

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