Semiconductor part for component mounting, mounting structure and mounting method

Abstract

A semiconductor part for component mounting, a mounting structure and a mounting method providing ample surplus wiring pitch and width between terminals in order to improve the strength of the connection with the printed circuit board in view of the recent trends towards a greater number of pins and greater component mounting density on printed circuit boards or substrates. A semiconductor component for mounting has area terminals comprised of area terminals mounted on the outer circumferential side and area terminals mounted on the inner circumferential side of the board. The area terminals on the outer circumferential side of the board are arranged with a larger pitch and or diameter than the area terminals on the inner circumferential side. A mounting method and mounting structure having land terminals arrayed on a printed circuit board or substrate with the same arrangement as the area terminals of the semiconductor component, and the land terminals are connected with the area terminals by a conductive bonding agent.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor part for component mounting, a mounting structure and a mounting method. [0003] 2. Description of Related Art [0004] Strong demands have been made in recent years for portable electronic equipment such as digital cameras, digital portable telephones and notebook type personal computers that are thinner, are more compact and have lighter weight. Therefore, to what extent the surface mounting density of the semiconductor components used in the above devices can be increased has become an important technical issue. [0005] To cope with this trend, the development of compact CSP (chip scale packages) typified by packaged ICs such as QFPs has progressed and some compact chip scale packages are now available. [0006] These chip scale packages (CSP) incidentally, as can be seen from their other name of FP-BGA (Fine Pitch BGA) are designed for a compact BGA (Ball Grid Array) an...

AI Technical Summary

Benefits of technology

[0023] The pitch array becomes finer (smaller) the more the area terminal is positioned on the inner side away from the outer circumferential side so that the number of terminals can be increased and the board is able to cope with recent and future trends towards increased numbers of pins.

[0024] The larger pitch array of the area terminals close to the outer circumference further signifies that the wiring routed between those area terminals towards the inner circumferential terminals has an ample margin and that easier mounting and lower board wiring costs can be achieved. The larger pitch array also means larger wires (or wiring) can be utilized so that high-speed, high frequency mounting can be achieved since losses due to resistance in the wiring are reduced.

Problems solved by technology

Therefore, to what extent the surface mounting density of the semiconductor components used in the above devices can be increased has become an important technical issue.

However, to cope with semiconductor LSI chips having higher density and more functions, the scope of the area terminal layout has shown a tend to continually increase and even the size of supposedly small CSP (chip scale packages) are becoming larger.

However, when miniaturizing the pitch array of area terminals in this way, reducing the size of the terminals is of course unavoidable.

Even when mounting (connecting) chip scale packages (CSP) on boards, there is a large possibility of the connection strength deteriorating due to factors such as heat stress after mounting.

Thus, when many wires are laid between the area terminals and the gap between the terminals becomes exceedingly small, then fine complex processing also becomes necessary on the board.

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