Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Determining hardware parameters specified when configurable IP is synthesized

a hardware parameter and configurable technology, applied in the field of semiconductor chip design, can solve the problems of confusion for new users, placing customization constraints, and difficulty in mentally keeping track of which particular copy contains hardware features of which particular values of configurable parameters

Active Publication Date: 2005-12-15
SYNOPSYS INC
View PDF11 Cites 43 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The invention is a method for customizing hardware parameters in a soft core, which allows for the creation of circuits with specific features. The user selects the desired values for each hardware parameter, which are used to generate a description of the circuit. The description also includes one or more storage units that hold the user-specified values. These values can be retrieved to identify customizations made to the circuit. The invention also allows for the automatic selection of a device driver based on the user-specified values and additional registers. The registers can include information about the version number of the soft core and the function of the circuit. Overall, the invention simplifies the process of creating circuits with specific features and reduces the need for manual documentation.

Problems solved by technology

Typically, the core designer's tool places constraints on customizations that the core integrator may make to the original soft core.
The inventor of the current patent application has found that when such copies become numerous (i.e. more than a couple), it can be difficult to mentally keep track of which particular copy contains hardware features of which particular values of the customizable parameters.
Moreover, the inventor notes that absence of documentation confuses a new user who takes over responsibility for the development work from a user who performed the customizations and now has numerous copies.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Determining hardware parameters specified when configurable IP is synthesized
  • Determining hardware parameters specified when configurable IP is synthesized
  • Determining hardware parameters specified when configurable IP is synthesized

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] In several embodiments of the invention, a computer 110 (FIG. 1A) is programmed to receive from a chip designer 111 (also called “user”) one or more values of one or more parameters of one or more hardware features to be customized in a soft core 112 (e.g. in the form of a text file that can be edited by a human) that is prepared by a vendor of intellectual property (IP). Note that although a text file is mentioned as an example of the format of soft core, in other examples soft core may be provided in other formats, such as a binary format or a byte code format as long as such format is sufficiently meaningful to a tool supplied to chip designer 111 for customization of the soft core (and an example of such a tool is a GUI as described next). Computer 110 may receive the values to be used in hardware customization via a graphical user interface (GUI), depending on the embodiment. Thereafter, the user-specified values are used by computer 110 to generate (e.g. through an edit...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

An attribute of a hardware feature to be customized in a soft core is parameterized so that a value received from a user can be used to generate a description of a circuit containing the customized hardware feature. The generated description also describes, in accordance with the invention, a register that is indicative of the customization. For example, the generated (customized) description may describe the register as containing the value. After the circuit is created, the register may be read (at any time) to identify the customization. Hence, access to such a register eliminates the need for a user to maintain documentation on values specified during customization. Such a register may additionally be used to identify a device driver that is appropriate for use with the customized hardware feature. Additional registers may be included in the generated description, e.g. to identify the function of the circuit, and the version number.

Description

BACKGROUND [0001] 1. Field of the Invention [0002] The invention relates to design of semiconductor chips. More specifically, the invention relates to a method and an apparatus for determining from a chip, values of one or more hardware parameters (e.g. FIFO size) that are specified when configurable intellectual property (IP) is synthesized. [0003] 2. Related Art [0004] In the past, semiconductor companies used to design a chip and supply the chip design to another company that owns a foundry for fabrication of the chip. Later on, some semiconductor companies began to simply supply intellectual property (IP) in the form of computer files commonly called “core” to chip designers who in turn used the core in their chip design. A chip designer may integrate IP cores for several devices (such as microprocessor, memory, and peripherals) from several vendors into a single design, which is then implemented in a single chip. For this reason, the chip designer is also referred to as “core i...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): G06F9/00G06F9/30G06F17/50
CPCG06F9/30101G06F2217/66G06F17/5045G06F30/30G06F2115/08
Inventor DOWLING, HUBERT H.
Owner SYNOPSYS INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products