Substrate treating system for depositing a metal gate on a high-k dielectric film and improving high-k dielectric film and metal gate interface
a high-k dielectric film and metal gate technology, applied in the direction of electrolysis components, vacuum evaporation coatings, coatings, etc., can solve the problems of faulty mosfet devices, affecting the yield of mosfets, and not being compatible with poly-si and most high-k dielectrics. , to achieve the effect of improving electron mobility, reducing vth shift, and improving electron mobility
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example 1
[0106]In FIG. 1, a thermal annealing module 1 and metal gate deposition module 2 are connected to a central wafer-handling platform 3, that is to say, a thermal annealing module 1 and metal gate deposition module 2 are integrated to a central wafer-handling platform 3.
[0107]A cross sectional view of the thermal annealing module 1 is shown in FIG. 6. Preferably, the thermal annealing module 1 is a rapid thermal annealing module. The thermal annealing module 1 such as RTP module, shown in FIG. 6, is comprised of a substrate holder 19, a wafer heating mechanism 20 heating a substrate 4 placed on the substrate holder 19, gas inlet 21, a gas outlet 22 and substrate in / out port 33 as shown in FIG. 6.
[0108]Typically, the heating mechanism 20 is an infrared (IR) heating process assisted by IR lamps. Usually, the thermal annealing module 1 such as RTP module can heat a substrate 4 to a temperature around 1000°C. within several seconds. During the substrate heating, substrate holder 19 may or...
example 2
[0121]FIG. 3 shows an example which is an extension of working example 1, wherein there is an additional high-k dielectric deposition module 10 attached to the central wafer handling platform 3 described in working example 1.
[0122]In the example shown in FIG. 3, a high-k dielectric deposition module 10 is connected to the central wafer-handling platform 3 in addition to the configuration shown in FIG. 2. That is to say, in FIG. 3, a thermal annealing module 1, metal gate deposition module 2, a cooling module 8, a high-k dielectric deposition module 10 and a wafer loading / unloading equipment-front-end module 13 are integrated to a central wafer-handling platform 3.
[0123]A cooling module 8 may be removed from the configuration shown in FIG. 3.
[0124]The high-k dielectric deposition technique can be any desired technique, for example PVD, CVD, MOCVD or ALD. The parameters such as deposition pressure, precursor gases, temperature etc., depend on the type of deposition technique and high-...
example 3
[0132]FIG. 4 shows a schematic diagram of the integrated system comprised of two angled-PVD modules 11 and 12, one thermal annealing module 1, a cooling module 8, a central wafer-handling platform 3, and a wafer loading / unloading equipment-front-end module 13.
[0133]The hardware configuration of both angled-PVD systems 11 and 12 are the same except the target materials fixed to each cathode. A cross sectional diagram of an example of an angled-PVD module which can be adopted in the substrate treating system of the present invention is shown in FIG. 5.
[0134]The angled-PVD module 11 and 12 is comprised of a chamber having a chamber wall 27, a vacuuming port 28 and a wafer in / out port 29. The substrate holder 17 is provided in the chamber as shown in FIG. 5.
[0135]The angled-PVD modules 11 and 12 employ off-axis sputtering technology where substrate 4 and target 14 surfaces are not parallel as in conventional PVD systems. Instead these two surfaces make an angle a (denoted by numeral 15)...
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Abstract
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