Liquid crystal display, testing method thereof and manufacturing method thereof
a technology of liquid crystal display and test pad, which is applied in the direction of identification means, instruments, measurement devices, etc., can solve the problems of increasing the difficulty of vi test, increasing the resistance of wires, and insufficient room for test wires and test pads
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first embodiment
[0130]In addition, the shorting bar 320 and the gate driving signal wire 321,136, 137, and 138 are formed as the same layer as the data wire 171, 173, 175, 176, and 179 but they are formed as the same layer as the gate wire 121, 124, and 129 according to this embodiment. Therefore, the connecting portions 122 directly interconnect the gate driving signal lines 321 and the gate pads 129 without an additional connecting member. Meanwhile, the auxiliary data pad 97 is elongated to interconnect the data pad 179 and the shorting bar 320.
[0131]In other words, the shorting bar 320 and the gate driving signal wire 321, 136, 137, and 138 are interposed between the substrate 110 and the gate insulating layer 140, and contact holes 184 and 185 that expose the gate driving signal wire 137 and 138 are formed through the protective layer 180 and the gate insulating layer 140. In addition, the contact hole 188 that exposes the shorting bar 320 is formed through the protective layer 180 and the ga...
second embodiment
[0141]According to a tested LCD of the present invention, all the gate lines are connected to one gate driving signal line 321 that has two pads 137 and 138, as shown in FIG. 8. For comparison, an LCD of the prior art as described with reference to FIG. 10 is prepared and tested.
[0142]The gate test signal of the waveform Al shown in FIG. 11 is applied to the same position as was in the case of FIG. 10, and output waveforms are also observed at the same position as was in the case of FIG. 10. Regarding LCDs according to embodiments of the present invention, waveform A2 is observed from an LCD of separate wire type, and waveform A3 is observed from an LCD of previous gate type. Waveform A4 is observed from an LCD of the prior art.
[0143]As shown in FIG. 11, output waveforms A2 and A3 according to embodiments of the present invention show less delay and reduction in output signal than the output waveform A4 according to the prior art.
[0144]The same VI test process as described above can...
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Abstract
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