Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

System and Method for Power Optimization

a power optimization and system technology, applied in the field of computer hardware, can solve the problems of insufficient power consumption reduction techniques, and achieve the effect of reducing the total power consumption of the processor

Inactive Publication Date: 2011-09-01
NVIDIA CORP
View PDF35 Cites 82 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0011]Advantageously, embodiments of the invention provide techniques to decrease the total power consumption of a processor.

Problems solved by technology

However, these techniques do not reduce power consumption enough to meet the requirements of certain emerging technologies and products.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • System and Method for Power Optimization
  • System and Method for Power Optimization
  • System and Method for Power Optimization

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019]In the following description, numerous specific details are set forth to provide a more thorough understanding of the invention. However, it will be apparent to one of skill in the art that the invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring embodiments of the invention.

System Overview

[0020]FIG. 1 is a block diagram illustrating a computer system 100 configured to implement one or more aspects of the invention. Computer system 100 includes a central processing unit (CPU) 102 and a system memory 104 communicating via a bus path through a memory bridge 105. The CPU 102 includes one or more “fast” cores 130 and one or more “shadow” or slow cores 140, as described in greater detail herein. In some embodiments, the cores 130 are associated with higher performance and higher leakage power than the cores 140. Memory bridge 105 may be integrated into CPU 102 as shown i...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A technique for reducing the power consumption required to execute processing operations. A processing complex, such as a CPU or a GPU, includes a first set of cores comprising one or more fast cores and second set of cores comprising one or more slow cores. A processing mode of the processing complex can switch between a first mode of operation and a second mode of operation based on one or more of the workload characteristics, performance characteristics of the first and second sets of cores, power characteristics of the first and second sets of cores, and operating conditions of the processing complex. A controller causes the processing operations to be executed by either the first set of cores or the second set of cores to achieve the lowest total power consumption.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application in a continuation-in-part of U.S. patent application Ser. No. 12 / 137,053, filed on Jun. 11, 2008 (Attorney Docket No. NVDA / P003709), which is hereby incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates generally to computer hardware and, more specifically, to a system and method for power optimization.[0004]2. Description of the Related Art[0005]Low power design has become increasingly important in recent years. With the proliferation of battery-powered mobile devices, efficient power management is quite important to the success of a product or system.[0006]A number of techniques have been developed to increase performance and / or reduce power consumption in conventional integrated circuits (ICs). For example, sleep and standby modes, multi-threading techniques, multi-core techniques, and other techniques are currently implemented to increase perform...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): G06F15/76G06F9/02
CPCY02B60/1275Y02B60/144Y02B60/1217Y02B60/162G06F1/206G06F9/5094G06F1/3203Y02B60/142G06F9/5088G06F1/329Y02B60/1278G06F2209/508G06F1/3293G06F2209/5022Y02B60/121G06F1/324Y02B60/1282G06F1/3287G06F15/8007Y02D10/00G06F1/32G06F9/505
Inventor MATHIESON, JOHN GEORGECARMACK, PHILSMITH, BRIAN
Owner NVIDIA CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products