Unlock instant, AI-driven research and patent intelligence for your innovation.

Wafer level diode package structure

a diode and package technology, applied in the direction of semiconductor devices, electrical apparatus, semiconductor/solid-state device details, etc., can solve the problems of poor electric conductivity of the prior art, increased etc., and achieve good electric conductivity of the present invention, material cost and manufacturing cost reduction

Inactive Publication Date: 2011-12-15
HARVATEK CORPORATION
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a wafer level vertical diode package structure and a method for making it. The structure includes a first semiconductor layer, a second semiconductor layer, an insulative layer, and two conductive structures. The conductive structures are vertically and electrically disposed on a printed circuit board (PCB), making the electrical path short and improving electric conductivity. The structure does not require a wire-bonding process and package colloid, reducing material and manufacturing costs. The method includes forming grooves in the semiconductor layers, insulating the layers with the grooves, and forming conductive structures on the insulated layers. The structure can be directly cut from a diode wafer, eliminating the need for grinding.

Problems solved by technology

1. The wire-bonding process using metal wire L and the package process using the package colloid C are necessary in the prior art. Hence, the material cost and the manufacturing cost are increased.
2. The P-type semiconductor layer P is electrically connected to the PCB D via the metal wire L, so that the electrical path is long. Hence, the electric conductivity of the prior art is bad.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Wafer level diode package structure
  • Wafer level diode package structure
  • Wafer level diode package structure

Examples

Experimental program
Comparison scheme
Effect test

first embodiment

[0035]Referring to FIGS. 2, 2A1-2I1 and 2I2, the present invention provides a method for making a wafer level vertical diode package structure. The method includes the following steps:

[0036]The step S100 is: referring to FIGS. 2, 2A1 and 2A2 (FIG. 2A1 is a partial cross-sectional view of FIG. 2A2), providing a diode wafer Wa that has a first semiconductor unit Pa and a second semiconductor unit Na connected with a bottom side of the first semiconductor unit Pa. In addition, the first semiconductor unit Pa can be a P-type semiconductor layer and the second semiconductor unit Na can be an N-type semiconductor layer; Alternatively, the first semiconductor unit Pa can be an N-type semiconductor layer and the second semiconductor unit Na can be a P-type semiconductor layer, according to different requirements.

[0037]The step S102 is: referring to FIGS. 2, 2B1 and 2B2 (FIG. 2B2 is a partial top view of FIG. 2B1), forming a plurality of grooves Ga interlaced with each other and passing thro...

fifth embodiment

[0060]Referring to FIGS. 4, 4A-4I1 and 4I2, the present invention provides a method for making a wafer level vertical diode package structure. The method includes the following steps:

[0061]The step S200 is: referring to FIGS. 4 and 4A, providing a diode wafer We that has a first semiconductor unit Pe and a second semiconductor unit Ne connected with a bottom side of the first semiconductor unit Pe. In addition, the first semiconductor unit Pe can be a P-type semiconductor layer and the second semiconductor unit Ne can be an N-type semiconductor layer; Alternatively, the first semiconductor unit Pe can be an N-type semiconductor layer and the second semiconductor unit Ne can be a P-type semiconductor layer, according to different requirements.

[0062]The step S202 is: referring to FIGS. 4 and 4B, forming a plurality of first grooves G1e interlaced with each other and passing through the first semiconductor unit Pe and one part of the second semiconductor unit Ne.

[0063]The step S204 is:...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A wafer level vertical diode package structure includes a first semiconductor layer, a second semiconductor layer, an insulative unit, a first conductive structure, and a second conductive structure. The second semiconductor layer is connected with one surface of the first semiconductor layer. The insulative unit is disposed around a lateral side of the first semiconductor layer and a lateral side of the second semiconductor layer. The first conductive structure is formed on a top surface of the first semiconductor layer and on one lateral side of the insulative layer. The second conductive structure is formed on a top surface of the second semiconductor layer and on another opposite lateral side of the insulative layer.

Description

CROSS REFERENCE TO RELATED APPLICATION[0001]This application is a continuation application of U.S. application Ser. No. 12 / 318,876, filed on 12 Jan. 2009 and entitled “WAFER LEVEL VERTICAL DIODE PACKAGE STRUCTURE AND METHOD FOR MAKING THE SAME”, currently pending.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a diode package structure, and particularly relates to a wafer level vertical diode package structure.[0004]2. Description of Related Art[0005]Referring to FIG. 1, the prior art provides a diode package structure that includes a P-type semiconductor layer P, an N-type semiconductor layer N, a metal wire L and a package colloid C. The P-type semiconductor layer P connects with the N-type semiconductor layer N. The N-type semiconductor layer N is electrically disposed on a PCB (Printed Circuit Board) D directly, and the P-type semiconductor layer P is electrically connected to the PCB D via the metal wire L. In addition, the P-typ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/861
CPCH01L21/6836H01L2924/0107H01L24/03H01L24/05H01L24/06H01L24/16H01L24/17H01L24/96H01L29/0657H01L2224/13099H01L2224/48091H01L2224/48247H01L2924/0101H01L2924/01011H01L2924/01014H01L2924/01015H01L2924/01046H01L2924/01082H01L2924/014H01L2224/04042H01L2224/0401H01L2224/73265H01L2224/32245H01L2224/05H01L24/48H01L2924/01005H01L2924/01006H01L2924/01021H01L23/31H01L2924/00015H01L2924/00014H01L2924/00H01L2224/451H01L24/45H01L2924/181H01L2224/04105H01L2224/12105H01L2224/05599H01L2924/00012
Inventor WANG, BILYHSIAO, SUNG-YICHEN, JACK
Owner HARVATEK CORPORATION