Overlay metrology system and method

Abstract

Overlay metrology systems are provided which include, for instance: a first metrology pattern including at least two first pairs of sub-patterns, at least one sub-pattern lacking 90 degree rotational symmetry, and a first center position for the first metrology pattern being determinable in an X-Y coordinate layout from the at least two first pairs of sub-patterns; and a second metrology including at least two second pairs of sub-patterns, at least one sub-pattern lacking 90 degree rotational symmetry, and a second center position for the second metrology pattern being determinable in the X-Y coordinate layout from the at least two second pairs of sub-patterns. Methods of making overlay metrology systems are also provided, which include, for instance, providing a first metrology pattern and a second metrology pattern, and arranging the metrology patterns in relation to each other within the X-Y coordinate layout.

Description

FIELD OF THE INVENTION[0001]The present invention generally relates to fabrication of integrated circuits, and more particularly, to a system and method for facilitating determining overlay accuracy between circuit structure fields of one or more layers of a circuit structure.BACKGROUND[0002]Conventional fabrication of integrated circuits generally requires the formation of multiple integrated circuit patterns, or fields, on one or more layers over a substrate wafer. These fields generally include numerous regions of micro-structures or nano-structures that are formed through photolithography, wet or dry etching processes, implantation or deposition processes, and the like. The relative positioning and alignment, or “overlay,” between such fields is an important component of ensuring the functionality of the resultant integrated circuit, and as such minimizing overlay errors is a significant concern in the manufacturing of circuit structures such as integrated circuits. Typically, t...

AI Technical Summary

Benefits of technology

The patent text describes a method for determining the accuracy of an overlay between two circuit structures. The method involves creating two metrology patterns, one for each circuit structure field, which include sub-patterns that lack symmetrical rotational relationships. The patterns are arranged in relation to each other within a specific coordinate system. The technical effect of this method is to provide a more accurate measure of the alignment accuracy between different circuit structures, leading to improved product performance and reliability.

Problems solved by technology

Existing overlay metrology target patterns generally may address some of these issues but at the cost of failing to address or exacerbating other issues.

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