Semiconductor package and manufacturing method thereof

Abstract

A semiconductor package including an insulating layer, a chip, a thermal interface material, a heat-dissipating cover and a re-distribution layer is provided. The insulating layer has an accommodating opening. The chip is disposed in the accommodating opening. The chip has an active surface, a back surface opposite to the active surface and a side surface connected to the active surface and the back surface. The thermal interface material is filled in the accommodating opening for at least encapsulating the side surface of the chip and exposing the active surface. The re-distribution layer and the heat-dissipating cover are disposed on two side of the insulating layer respectively. The heat-dissipating cover is thermally coupled to the chip through the thermal interface material. The re-distribution layer covers the active surface of the chip and the thermal interface material, and the re-distribution layer is electrically connected to the chip.

Description

BACKGROUND[0001]Field of the Invention[0002]The invention relates to a package and a manufacturing method thereof, and more particularly to a semiconductor package and a manufacturing method thereof.[0003]Description of Related Art[0004]To satisfy the needs for electronic products to be slim and small, semiconductor packages serving as core elements of the electronic products also develop toward miniaturization. Recently in the industry, a miniature semiconductor package such as chip-size package (CSP) has been developed, which is characterized in that a size of the CSP is approximately a size of a chip thereof or slightly larger than the size of the chip thereof. On the other hand, in addition to the miniature size, the semiconductor packages also need to enhance integrity and an amount of input / output terminals (I / O) for electrical connection to external electronic devices such as a circuit board, so as to satisfy the needs for electronic products to have high performance and high...

AI Technical Summary

Benefits of technology

The present invention provides a semiconductor package with improved heat-dissipating efficiency. The package includes an insulating layer with an accommodating opening, a chip placed in the opening, and a thermal interface material filling the opening and exposing the chip's active surface. A re-distribution layer is formed on the insulating layer and is electrically connected to the chip. The package also includes a heat-dissipating cover and a plurality of solder balls for electrical connection. The method for manufacturing the semiconductor package includes steps of forming the insulating layer, the heat-dissipating material layer, and the re-distribution circuit structure, and optionally separating the heat-dissipating material layer from the carrier. The semiconductor package has improved heat-dissipating efficiency and is suitable for high-performance applications.

Problems solved by technology

Generally speaking, the molding compound formed via the molding process is thicker, which is unfavorable to the miniaturization of the WLCSP.

In addition, since the molding compound has a lower thermal conductivity coefficient and unfavorable heat-dissipating effects, heat generated by the chip is mostly transmitted outside via a re-distribution layer, which has limited heat-dissipating area or heat-dissipating path.

Therefore, heat-dissipating efficiency is unfavorable.

Under the circumstance that the heat cannot be rapidly transmitted to the outside and is accumulated inside the WLCSP, a warpage may easily occur in the WLCSP.

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