Data writing method and storage controller
a data writing and storage controller technology, applied in the field of data writing methods, can solve problems such as reducing working efficiency, and achieve the effect of efficient execution
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first embodiment
[0074]FIG. 5A is a schematic diagram illustrating an atomic write operation according to the first embodiment of the invention. FIG. 5B is a schematic diagram illustrating a meta data corresponding to the atomic write operation illustrated in FIG. 5A according to the first embodiment of the invention.
[0075]Referring to FIG. 5A, for descriptive convenience, it is assumed that each physical block has N physical pages, each physical page has four access units, each access unit (also known as the physical sub-unit) has one error checking and correcting unit, and the write data (the user data) and the meta data corresponding to the write data are stored together into one access unit (which is similar to the example of FIG. 4C but each access unit only includes one error checking and correcting unit).
[0076]For instance, with the passage of time, according to the first atomic write command, the processor 211 instructs the memory interface control circuit 213 to write two write data 601(1) ...
second embodiment
[0094]FIG. 6A is a schematic diagram illustrating an atomic write operation according to the second embodiment of the invention. FIG. 6B is a schematic diagram illustrating a meta data corresponding to the atomic write operation illustrated in FIG. 6A according to the second embodiment of the invention.
[0095]Referring to FIGS. 6A and 6B, the first atomic write command, the second atomic write command and the hardware components in the second embodiment are identical to those in the first embodiment. The difference between the second embodiment and the first embodiment is that, the special event occurs at a time point T2 in the second embodiment.
[0096]Specifically, after the processor 211 writes the write data 602(1) and the meta 502(1) into the physical sub-unit 1102(N.3) according to the second atomic write command, the special event takes place in the storage device 20 at the time point T2. In other words, none of the write data 602(2) and the meta data 502(2) to be written into t...
third embodiment
[0102]FIG. 7A is a schematic diagram illustrating an atomic write operation according to the third embodiment of the invention. FIG. 7B is a schematic diagram illustrating a meta data corresponding to the atomic write operation illustrated in FIG. 7A according to the third embodiment of the invention. Referring to FIGS. 7A and 7B, the hardware components in the third embodiment are identical to those of the first embodiment. The difference between the third embodiment and the first embodiment is that, in the third embodiment, the first atomic write command is configured to instruct storing the write data 601(1), 601(2), 601(3) and 601(4) to logical addresses “200”, “201”, “202” and “203” respectively. Also, the special event occurs at a time point T3 after the write data 601(3) and the corresponding meta data 501(3) are written into the physical sub-unit 1102(N.3).
[0103]In the example above, each of the meta data 501(1), 501(2) and 501(3) has the write identification code being “0”,...
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