Package structure and manufacturing method thereof

Abstract

A package structure includes a first redistribution structure, a chip, an insulation encapsulation and a protection layer. The first redistribution structure has a first surface and a second surface opposite to the first surface. The chip is disposed on the first surface of the first redistribution structure and has an active surface and a rear surface opposite to the active surface. The insulation encapsulation encapsulates the chip and the first surface of the first redistribution structure. The protection layer is directly disposed on the rear surface of the chip.

Description

CROSS REFERENCE TO RELATED APPLICATION[0001]This application claims the priority benefit of U.S. provisional application Ser. No. 62 / 484,907, filed on Apr. 13, 2017. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of specification.BACKGROUND OF THE INVENTION1. Field of the Invention[0002]The present invention generally relates to a package structure and a display, in particular, to a package structure having a protection layer.2. Description of Related Art[0003]With advancement of the technology, the electronic product has been designed to achieve being light, slim, short, and small, so as to develop products that are smaller in volume, lighter in weight, higher in integration, and more competitive in the market. As the products gradually shrinkage in volume, the risk of malfunction or failure of the electronic chip due to crack or warpage is increased accordingly. As such, how to miniature the package structure while...

AI Technical Summary

Benefits of technology

The present invention is directed to a package structure and a manufacturing method that can reduce the risk of malfunction or failure of the package structure. This is achieved by adding a protection layer on the rear surface of the chip to alleviate warping issues and improve the flip-chip bonding yield, ultimately strengthening the overall chip.

Problems solved by technology

As the products gradually shrinkage in volume, the risk of malfunction or failure of the electronic chip due to crack or warpage is increased accordingly.

As such, how to miniature the package structure while maintaining the reliability and the functionality of the package, so as to lower the risk of failure of the final products, has become a challenge to those researchers in the field.

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