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Ternary Content Addressable Memory Unit Capable Of Reducing Charge Sharing Effect

a technology of charge sharing and addressable memory, which is applied in the field of ternary content addressable memory units capable of reducing, can solve the problems of voltage charge sharing between the nodes, inability to sort stored data in advance, and difficulty in achieving instant data query

Active Publication Date: 2020-12-17
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This configuration effectively reduces matching errors caused by charge sharing, while also simplifying the circuit design and reducing manufacturing costs by minimizing the number of required metal layers.

Problems solved by technology

The stored data of some applications (such as network routers) needs to be updated dynamically, and the stored data cannot be sorted in advance.
It is difficult to achieve instant data query.
There is a voltage charge sharing problem between the nodes of conventional ternary content addressable memory.
If there is charge sharing between the nodes during evaluation phase of the memory operation, it may cause the node voltage to drop to a sufficiently low voltage so the output inverter would have a matching error.

Method used

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  • Ternary Content Addressable Memory Unit Capable Of Reducing Charge Sharing Effect
  • Ternary Content Addressable Memory Unit Capable Of Reducing Charge Sharing Effect
  • Ternary Content Addressable Memory Unit Capable Of Reducing Charge Sharing Effect

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Embodiment Construction

[0012]FIG. 1 is a diagram for a ternary content addressable memory (TCAM) unit 100 in an embodiment of the present invention. The TCAM unit 100 includes a first inverter INV1, a second inverter INV2, a third inverter INV3, a fourth inverter INV4, a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, and a fifth a transistor T5, a sixth transistor T6, a seventh transistor T7, and an eighth transistor T8. The first inverter INV1 includes an input terminal and an output terminal coupled to a first node NA. The second inverter INV2 includes an input terminal coupled to the first node NA and an output terminal coupled to the input terminal of the first inverter INV1. The third inverter INV3 includes an input terminal coupled to a second node NB and an output terminal. The fourth inverter INV4 includes an input terminal coupled to the output terminal of the third inverter INV3 and an output terminal coupled to the second node NB. The first transisto...

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Abstract

A ternary content addressable memory unit includes a first inverter, a second inverter, a third inverter, a fourth inverter, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor. The first inverter includes an input terminal, and an output terminal coupled to a first node. The second inverter includes an input terminal coupled to the first node and an output terminal coupled to the input terminal of the first inverter. The third inverter includes an input terminal coupled to a second node and an output terminal. The fourth inverter includes an input terminal coupled to the output terminal of the third inverter and an output terminal coupled to the second node.

Description

BACKGROUND OF THE INVENTION1. Field of the Invention[0001]The present invention is related to a ternary content addressable memory (TCAM) unit, and more particularly to a ternary content addressable memory unit capable of reducing charge sharing effect.2. Description of the Prior Art[0002]When performing digital data operations, the large amount of data needs to be processed. The stored data of some applications (such as network routers) needs to be updated dynamically, and the stored data cannot be sorted in advance. It is difficult to achieve instant data query. In order to effectively speed up searching large random data, content addressable memory (CAM) is adopted to solve various searching problems. Content addressable memory is like a huge lookup table. It can find the address of the matching keyword based on the input keyword. The architecture of CAM allows the keyword to be searched to be compared with the data stored in the CAM at the same time, and outputs the data address...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G11C15/04H01L27/11H10B10/00
CPCH01L27/1104G11C15/04H01L27/0207H10B10/12
Inventor TSENG, CHUN-YENLUNG, CHING-CHENGKUO, YU-TSEHUANG, CHUN-HSIENTSAI, CHIH-WEIYU, HSIN-CHIHWANG, SHU-RU
Owner UNITED MICROELECTRONICS CORP