Apparatus and method for improving graphics processing performance
a graphics processing and apparatus technology, applied in the field of graphics processors, can solve problems such as too resource-intensive for real-time performan
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[0317]There are many types of neural networks; a simple type of neural network is a feedforward network. A feedforward network may be implemented as an acyclic graph in which the nodes are arranged in layers. Typically, a feedforward network topology includes an input layer and an output layer that are separated by at least one hidden layer. The hidden layer transforms input received by the input layer into a representation that is useful for generating output in the output layer. The network nodes are fully connected via edges to the nodes in adjacent layers, but there are no edges between nodes within each layer. Data received at the nodes of an input layer of a feedforward network are propagated (i.e., “fed forward”) to the nodes of the output layer via an activation function that calculates the states of the nodes of each successive layer in the network based on coefficients (“weights”) respectively associated with each of the edges connecting the layers. ...
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[1013]The following are example implementations of different embodiments of the invention
[1014]Example 1. An apparatus comprising: a tesselator to tessellate an input patch to a grid primitive comprising a plurality of interconnected quads, each quad comprising two implicit triangles and sharing at least two vertices with an adjacent quad; a bounding box generator to construct a bounding box to bound each quad of the grid primitive to produce a plurality of bounding boxes corresponding to the plurality of interconnected quads; and ray traversal hardware logic to determine if a ray traverses one or more of the plurality of bounding boxes; and intersection hardware logic to process a bounding box traversed by the ray to determine if the ray intersects one of the implicit triangles represented by the quad which is bounded by the bounding box.
[1015]Example 2. The apparatus of example 1 wherein the grid primitive comprises an M×M matrix of vertices forming the plurality of interconnect q...
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