Computer bridge interfaces for accelerated graphics port and peripheral component interconnect devices

a technology of peripheral components and bridge interfaces, which is applied in the field of computer bridge interfaces for accelerated graphics ports and peripheral component interconnect devices, can solve the problems of increasing complexity of 3-d graphics and and achieves the effect of increasing the amount of graphics data stored in memory and increasing the speed of access

Inactive Publication Date: 2003-05-20
COMPAQ COMP CORP
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Problems solved by technology

Increasingly complex 3-D graphics require higher speed acce

Method used

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  • Computer bridge interfaces for accelerated graphics port and peripheral component interconnect devices
  • Computer bridge interfaces for accelerated graphics port and peripheral component interconnect devices
  • Computer bridge interfaces for accelerated graphics port and peripheral component interconnect devices

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Embodiment Construction

The following patents or patent applications are hereby incorporated by reference:

U.S. Pat. No. 5,889,970, issued on Mar. 30, 1999, entitled "Dual Purpose Apparatus, Method and System for Accelerated Graphics Port and Peripheral Component Interconnect" by Ronald T. Horan and Sompong P. Olarig.

U.S. Pat. No. 5,892,964, issued on Apr. 6, 1999, entitled "Computer Bridge Interfaces for Accelerated Graphics Port and Peripheral Component Interconnect Devices" by Ronald T. Horan, Gary W. Thome and Sompong P. Olarig.

One or more specific embodiments of the present invention will be described below. In an effort to provide a concise description of these embodiments, not all features of an actual implementation are described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with syst...

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Abstract

A core logic chip set is provided in a computer system to provide a bridge between host and memory buses and an accelerated graphics port ("AGP") bus adapted for operation of two AGP devices, or one AGP device and one peripheral component interconnect ("PCI") device. A common AGP bus having provisions for the PCI and AGP interface signals is connected to the core logic chip set and the AGP and/or PCI device(s). The core logic chip set has an AGP/PCI arbiter having Request ("REQ") and Grant ("GNT") signal lines for each AGP and/or PCI device connected to the AGP bus. Another embodiment has a plurality of AGP buses for a plurality of AGP devices. This allows concurrent operation for AGP devices connected to different AGP buses. Two of the AGP buses may be combined to connect to one 64 bit PCI device.

Description

1. Field of the InventionThe present invention relates to computer systems using a bus bridge(s) to interface a central processor(s), video graphics processor(s), random access memory and input-output peripherals together, and more particularly, and more particularly, in utilizing a bus bridge(s) in a computer system for dual accelerated graphics ports.2. Description of the Related ArtThis section is intended to introduce the reader to various aspects of art which may be related to various aspects of the present invention which are described and / or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.Use of computers, especially personal computers, in business and at home is becoming more and more pervasive because the co...

Claims

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Application Information

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IPC IPC(8): G06F13/40G06F3/14
CPCG06F3/14G06F13/405G06F13/4027
Inventor OLARIG, SOMPONG PAUL
Owner COMPAQ COMP CORP
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