Flash memory device with sense-amplifier-bypassed trim data read

Abstract

A non-volatile memory device includes a two-dimensional array of non-volatile memory cells where a first portion of memory cells being configured as an one-time-programmable memory area; a bypass read-out circuit configured to sense a signal level on a bit line in response to a memory cell in the one-time-programmable memory area being selected and to generate a first signal indicative of the signal level on the bit line; and a trim data latch circuit having an input terminal configured to receive the first signal. The trim data latch circuit is configured to store a signal related to the first signal as a trim data value and to provide trim data value to circuitry of the non-volatile memory device. The trim data value may be applied to adjust a signal level of the circuitry of the non-volatile memory device.

Description

BACKGROUND OF THE INVENTION[0001]Non-volatile memory (NVM) is a memory device that retains content stored therein even when power is removed. EEPROM and flash memory are two commonly used non-volatile memory devices. In particular, flash memory has become widely used in electronic devices, especially portable electronic devices, because of its ability to provide data storage at low power levels. Modern day flash memory devices are typically implemented using a floating gate MOS transistor device as the memory cells. A floating gate MOS transistor device includes a floating gate that is formed between a control gate and the channel region (the substrate) of the MOS device and at least partially vertically aligned with the control gate. Charge storage on the floating gate determines the stored data state (“0” or “1”) of the memory cell.[0002]The operation of the NVM memory device typically requires specified and stable reference voltage or current to ensure proper circuit operation. D...

AI Technical Summary

Benefits of technology

The invention is about a method and circuit for reading and adjusting the reference voltage or current of a non-volatile memory (NVM) device. The method allows for the proper operation and compensation of the NVM device by setting the desired operating point through trimming, which involves adjusting the internal reference sources. The invention provides a solution for ensuring proper operation of the NVM device by allowing for two-way read operation of trim data and compensating for temperature coefficients. The invention also includes a dedicated area of the memory array for storing trim data. The technical effects of the invention include improving the stability and reliability of the NVM device and optimizing its performance.

Problems solved by technology

However, in some cases, it may not be possible to read out correctly the trim data from the NVM memory array upon power-up and before adjustments of the analog levels can be applied.

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