Processes for manufacturing printed wiring boards

Abstract

Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application is a continuation-in-part of U.S. patent Ser. No. 11 / 214,690 to Vasoya filed Aug. 29, 2005 now U.S. Pat. No. 7,301,105 and claims the benefit of U.S. Provisional Patent Application Ser. No. 60 / 750,013 to Vasoya filed Mar. 6, 2006. The disclosure of U.S. patent application Ser. No. 11 / 214,690 to Vasoya and U.S. Provisional Patent Application Ser. No. 60 / 780,013 to Vasoya is hereby incorporated herein by reference in its entirety.BACKGROUND[0002]The present invention generally relates to the manufacture of printed wiring boards and more specifically to the filling of clearance patterns in conductive constraining core layers used in the construction of multilayer printed wiring board (PWB).[0003]Computers and similar electronics products are pervasive in consumer, businesses, military, aerospace and governmental activities. The use of electronics in critical applications has created an increased demand for reliable electroni...

AI Technical Summary

Benefits of technology

This patent describes a method for creating printed wiring boards with electrically conductive cores. The method involves drilling a clearance pattern in the core and filling the clearance pattern with resin to create a single lamination cycle. The resulting printed wiring board includes the electrically conductive core and additional layers without requiring a separate lamination cycle. The method also allows for the creation of plated through holes without requiring a separate lamination cycle. The electrically conductive core has a dielectric constant greater than 6 at 1 MHz and can be made from fibrous material or carbon fiber. The method also includes screening resin into the clearance pattern and stacking multiple electrically conductive cores. The patent also describes a design for the electrically conductive core that includes a base substrate material and an insert substrate material. The method allows for the creation of plated through holes without overlapping with other components on the printed wiring board.

Problems solved by technology

Applications for printed wiring boards can include challenges such as thermal management, expansion mismatch control, low stiffness or rigidity and higher weight.

Use of these materials and the associated additional processes are typically associated with a substantially lower manufacturing yield and additional labor cost.

In addition, drilling small via holes or plated through holes (PTH) through thick metal cores can be problematic.

An inability to drill small via holes through a material can limit the usefulness of the material in the construction of high density interconnects.

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