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DRAM and manufacturing method thereof

A technology of dynamic random access and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, electrical components, transistors, etc., and can solve the problems that the data storage time cannot be effectively extended, and the junction leakage current cannot be improved.

Inactive Publication Date: 2007-11-21
PROMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the main leakage current is caused by junction leakage current, and this junction leakage current has not been improved here, so the data retention time cannot be effectively extended

Method used

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  • DRAM and manufacturing method thereof
  • DRAM and manufacturing method thereof
  • DRAM and manufacturing method thereof

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Embodiment Construction

[0052] 1A-1E are cross-sectional views of the manufacturing process of the DRAM in a preferred embodiment of the present invention.

[0053] Please refer to FIG. 1A, the manufacturing method of DRAM first provides a substrate 100, and this substrate 100 has a top surface 101 and at least one deep trench 106 in the substrate, wherein patterns have been formed on the top surface mask layer 104 to expose the deep trench 106 located in the substrate 100, wherein the material of the mask layer 104 is, for example, silicon nitride, and its formation method is, for example, chemical vapor deposition (Chemical Vapor Deposition, CVD) craft.

[0054] In a preferred embodiment, forming a pad layer 102 on the substrate 100 is also included before forming the mask layer 104 . The material of the pad layer 102 is, for example, silicon oxide, and its formation method is, for example, performing a thermal oxidation process. In addition, the method of forming the patterned pad layer 102 and ...

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Abstract

This invention provides one dynamic random memory device and its process method with carbon silicon area and carbon silicon mixed area, which comprises the following steps: Providing underlay with one top and at least one deep groove on underlay, wherein, the top is covered one patterned mask layer and the deep groove is filled with one cover layer on the bottom and side wall downside; filling carbon mixture and germanium mixture to the deep groove top side above the carbon mixture area; forming one top layer on the sidewall on the deep groove; processing at least one thermal process. Due to carbon silicon area provides high energy leakage current to reduce electrode deepness and reduces leakage current phenomenon to extend data memory time.

Description

technical field [0001] The present invention relates to a semiconductor element and its manufacturing method, and in particular to a dynamic random access memory and its manufacturing method. Background technique [0002] DRAM is a volatile memory used to store frequently accessed data in a computer. A typical DRAM cell is composed of a metal oxide semiconductor transistor and a capacitor, wherein the source / drain of the transistor is electrically connected to the capacitor and the bit line respectively. There are mainly two types of capacitors used in DRAM. One is a stacked capacitor disposed on the surface of the substrate, and the other is a deep trench capacitor disposed in the substrate. [0003] In the next development stage of DRAM, the demand for data storage time will increase exponentially, so how to increase the data storage time of storage electrodes is the goal of efforts at this stage. Regarding increasing the data storage time, there are mainly two methods, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8242H01L27/108
Inventor 巫勇贤
Owner PROMOS TECH INC
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