Structure of shallow ridge isolation area and dynamic DASD and its mfg method

Abstract

First, patterned mask layer is formed on a substrate. Next, an ion-implantation step is carried out in order to form a doping range on substrate uncovered by mask layer. Then, an etching step is carried out in order to patternize substrate. Thus, a groove is formed on the substrate, and doping area is exposed at bottom of groove. A insulating layer is filled into the groove to form a shallow groove isolation region. In the invention, doping area is formed at bottom of shallow groove isolation region, and not formed at side wall.

Description

technical field [0001] The present invention relates to a structure of a semiconductor element and a manufacturing method thereof, and in particular to a structure of a shallow trench isolation region and a dynamic random access memory and a manufacturing method thereof. Background technique [0002] When semiconductors enter the deep sub-micron (Deep Sub-Micron) process, the size of the components gradually shrinks. For the previous DRAM structure, it means that the space for capacitors is getting smaller and smaller. On the other hand, Due to the increasingly large computer application software, the memory capacity required is also increasing. For this situation where the size of the memory is reduced but the memory capacity needs to be increased, it shows that the manufacturing method of the capacitor of the previous dynamic random access memory must be Changed to fit the trend. [0003] Dynamic random access memory (DRAM) can be mainly divided into two forms according t...

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Problems solved by technology

However, this will make the p-type implant region 130 closer to the buried doped strip 110. In this case, if the starting voltage of the parasitic transistor is to be increased to increase the doping conce...

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