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Lock phare cycle frequency synthesizer

A frequency synthesizer, phase-locked loop technology, applied in the direction of automatic power control, electrical components, etc., can solve the problems of discontinuous phase signal, unable to obtain the best change timing, unable to synchronize two pulse removal circuits, etc.

Inactive Publication Date: 2007-12-05
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But as shown in Figure 1 and Figure 2, the same control signal is not used between the first pulse removal circuit 31 and the second pulse removal circuit 32, so the two pulse removal circuits cannot be synchronized; at the same time, When changing the divisor, it is not possible to obtain the best timing for changing, so there will be a problem of discontinuous phase signals

Method used

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  • Lock phare cycle frequency synthesizer
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  • Lock phare cycle frequency synthesizer

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Embodiment Construction

[0019] The phase-locked loop frequency synthesizer of the present invention will be described below with reference to the accompanying drawings. Since the phase-frequency comparator responds quickly to high-frequency signals, it can quickly achieve the purpose of frequency locking, but it is prone to unstable states, resulting in poor phase noise of the frequency-locking signal of the VCO. Relatively speaking, the phase-frequency comparator responds slowly to low-frequency signals, but it is relatively stable, which can make the phase noise of the frequency-locked signal of the voltage-controlled oscillator better. Therefore, utilizing this characteristic, the PLL frequency synthesizer of the present invention uses two-stage control to perform frequency locking control. That is, when the phase-locked state is not reached, the high-frequency signal can be output to the phase-frequency comparator. When the phase-locked loop frequency synthesizer is close to the phase-locked sta...

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Abstract

A synthesizer comprises reference signal generator to produce reference frequency signal, voltage control oscillator to produce oscillating frequency, the first and the second variable divider frequency divider for frequency dividing and output, the first and the second controllable synchronous frequency divider for synchronous frequency dividing or undividing, phase frequency comparator to detect phase differential and to output adjusted signal, charge pumping circuit to receive the adjusted signal, loop filter to output control voltage, phase-locking detector to output phase-locked signal and switching control logic to output signal for adjusting the charge pumping circuit and the loop filter.

Description

technical field [0001] The invention relates to a phase-locked loop frequency synthesizer, in particular to a fast frequency-locked phase-locked loop frequency synthesizer. Background technique [0002] Figure 1 shows the US Patent No. 5,173,665 "PLL Frequency Synthesizer Capable of Changing an Output Frequency at a High Speed ​​(PLL Frequency Synthesizer Capable of Changing an Output Frequency at a High Speed)". As shown in the figure, the PLL frequency synthesizer has a reference signal generator 121, a first pulse removal circuit 131, a second pulse removal circuit 132, a phase frequency comparator 124, a charge pump circuit 125, a loop filter 126 , a voltage controlled oscillator 122 , and a variable divisor frequency divider 123 . The phase-locked loop frequency synthesizer achieves the purpose of fast frequency locking to change the output frequency in a relatively high-frequency manner, and uses two pulse removal circuits 131 and 132 to separate the partial pulses of...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03L7/18H03L7/187
Inventor 柯凌维
Owner MEDIATEK INC