Scatterometry structure with embedded ring oscillator, and methods of using same

Abstract

The present invention is generally directed to a scatterometry structure with an embedded ring oscillator, and various methods of using same. In one illustrative embodiment, the method comprises forming a ring oscillator that comprises a first grating structure comprised of a plurality of gate electrode structures for a plurality of N-channel transistors and a second grating structure comprised of a plurality of gate electrode structures for a plurality of P-channel transistors, and measuring the critical dimension and / or profile of at least one of the gate electrode structures in the first grating structure and / or the second grating structure 24 using a scatterometry tool. In further embodiments, the method further comprises comparing the measured critical dimension and / or profile of the gate electrode structure to a model to predict at least one electrical performance characteristic of the ring oscillator. In another embodiment, the method further comprises forming at least one capacitance loading structure, comprised of a plurality of features, as a portion of the ring oscillator, and measuring the critical dimension and / or profile of at least one of the features comprising the capacitance loading structure using a scatterometry tool. The method further comprises comparing the measured critical dimension and / or profile of the feature to a model to predict at least one electrical performance characteristic of the ring oscillator.

Description

technical field [0001] The present invention relates generally to semiconductor fabrication techniques, and more particularly to scatterometry structures with embedded ring oscillators and various methods of using the structures. Background technique [0002] There is a continuing trend in the semiconductor industry to increase the operating speed of integrated circuit devices, ie, microprocessors, memory devices, and the like. This trend is motivated by user demands for computers and electronic devices that operate at faster and faster speeds. This demand for increased speed has led to continued reductions in the size of semiconductor devices such as transistors. That is, many elements of a typical field-effect transistor (FET), such as channel length, junction depth, gate insulation thickness, etc., need to be reduced. For example, assuming all other components remain constant, the smaller the channel length of the transistor, the faster the transistor will operate. Acc...

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Problems solved by technology

Furthermore, as millions of gate structures are formed on a substrate at closer adjoining distances and inherent to SEMs, data obtained using SEM does not provide information on the full profile of the gate structures

That is, because of the extra noise and interface, SEM can only be used to obtain gates of approximately moderate thickness level

Therefore, the profile of the gate adjacent to the substrate surface cannot be easily inspected with existing SEM measurement tools

Therefore, important information such as critical dimension and / or profile of the gate may be lost, thereby affecting the performance of the device

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