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Semiconductor processing process

A semiconductor and conductor technology, applied in the field of semiconductor processing, can solve the problems of increased cost and operation complexity

Inactive Publication Date: 2008-04-23
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Using this kind of reinforced structure as a solution may have some effect, but it involves the use of special materials, which increases the cost and complexity of operations

Method used

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  • Semiconductor processing process
  • Semiconductor processing process
  • Semiconductor processing process

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Embodiment Construction

[0085] refer to Figures 6a-6h A representative embodiment of the semiconductor processing process of the present case is described, which is applied to a semiconductor 60, the semiconductor 60 includes a semiconductor electrical connection surface 61 and a semiconductor non-electrical connection surface 62, and has an original thickness 63, the original thickness 63 is formed by the semiconductor Defined by the distance from the non-electrical connection surface 62 to the semiconductor electrical connection surface 61, representative embodiments of this semiconductor processing process include:

[0086] A light-transmitting substance 64, such as glass, plastic, etc., is pasted on the semiconductor electrical connection surface 61;

[0087] Grind (with grinding tool 30) this semiconductor 60 from this semiconductor non-electric connection surface 62, obtain a new semiconductor non-electric connection surface 65, the distance 70 of this new semiconductor non-electric connection...

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Abstract

The semiconductor processing procedure is in use for grinding, cutting semiconductor and expanding to subsequent encapsulation procedure for adhering semiconductor on carrier, stacking semiconductor etc. after grinding, cutting procedures. Photic material is pasted on electrical connection surface of the semiconductor. Non-electrical connection surface is ground. Cutting procedure is carried out through the photic material toward to the semiconductor in order to obtain smaller crystal grains. The easy operation can reduce defective rate. In subsequent procedures said above, the photic material is adhered to crystal grains to protect them. The photic material and adhesive bonding martial can be removed from crystal grains easily since these materials will lose their stickiness after receiving light beam.

Description

field of invention [0001] This case is related to the process of semiconductor grinding and dicing, especially the process of semiconductor grinding, dicing and subsequent packaging of semiconductors attached to carriers, semiconductor stacks, etc. The process of packaging such as the carrier, the resulting die stack, etc. Background technique [0002] The miniaturization and thinning of components is a trend in the industry related to integrated circuits and semiconductors. For example, as disclosed in US Patent No. 5,793,108, in order to stack multiple chips under a known package structure, the chip must be ground to 2-4 mils. [0003] Processes for thinning wafers are known, such as those disclosed in US Pat. In Fig. 1a, the adhesive tape 3 is pasted on the front side 2 of the wafer 1 (the surface having the welding pad 6), so that the back side 4 of the wafer 1 is ground with a grinding tool 30 (as shown in Fig. 1b ), and a thin Wafer 11 (as shown in Figure 1c), the fr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/304B28D5/00
Inventor 蔡汉龙刘儒生萧承旭
Owner SILICONWARE PRECISION IND CO LTD