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Method and circuit arrangement for determining power supply noise

A power supply noise and circuit technology, applied in CAD circuit design, electrical digital data processing, special data processing applications, etc.

Inactive Publication Date: 2009-04-29
III HLDG 6
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, according to "Estimation of Switching Noise on Power Supply Lines in Deep Sub-Micron CMOS Circuits" by S. Zhao et al., Proceedings of the 13th International Conference on VLSI Design, Jan. 2000, pp. 168-173, PSN Always an outstanding issue for high speed systems

Method used

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  • Method and circuit arrangement for determining power supply noise
  • Method and circuit arrangement for determining power supply noise
  • Method and circuit arrangement for determining power supply noise

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Embodiment Construction

[0023] A preferred embodiment of the present invention will now be described on the basis of a monitoring circuit for real-time monitoring of a PSN of a digital circuit. Monitoring strategies include impact on monitoring circuit delays via PSN

[0024] to measure the PSN. The monitoring circuit converts the variable delay into a variable voltage that can be compared to a threshold or subsequently converted into digital data. In this way, the monitoring circuit can be used to test excessive PSNs online, or be used The monitoring portion of any scheme that changes operating circuit parameters to bring the circuit within the desired PSN specification.

[0025] Fig. 1(a) shows a schematic block diagram representing an overview of the proposed PSN monitoring circuit according to a preferred embodiment. The PSN monitoring circuit comprises a delay block or circuit 10 and a delay measurement circuit 20 which measures the propagation delay between the input and the output of the del...

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Abstract

The present invention relates to a method and circuit arrangement for determining power supply noise of a power distribution network. The power supply noise is determined by measuring the propagation delay of a delay circuit powered by the power distribution network, wherein the result of the measuring step is used as an indicator of the power supply noise. Thereby, a real-time power supply noise monitoring can be carried out at any point of a power distribution network of an observed circuitry.

Description

technical field [0001] The invention relates to a method and a circuit arrangement for determining power supply noise in a distribution network, in particular to a circuit arrangement provided on an integrated circuit comprising a distribution network. Background technique [0002] Especially in high-speed digital integrated circuits (ICs), to face the power supply noise (PSN) problem. Due to their complexity, integration density, and speed of operation, such modern integrated circuits suffer from signal crosstalk between connecting wires. PSN is equivalent to the change of power supply voltage or ground potential due to the action of circuit switch. Increases in complexity and integration density lead to increased electrical interactions between the conductors of the connection lines that distribute the supply voltage and the active circuitry. Therefore, the current drop peak generated during the switching action is converted into a voltage bounce or change in the power s...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
CPCG06F17/5036G06F17/5022G06F30/33G06F30/367G06F17/00
Inventor J·里乌斯巴斯克斯J·D·J·皮内达德吉韦斯
Owner III HLDG 6