Flip chip packaging structure with girth member and packaging method thereof

Abstract

The invention discloses a flip chip package structure with a strengthening part and a method for packing the same, wherein the flip chip package structure comprises a package carrier plate, a first strengthening part, a chip and a second strengthening part; the first strengthening part is arranged on the surface of the package carrier plate; the chip has a plurality of welding convex blocks to realize electrical connection between the chip and the package carrier plate; the second strengthening part which is also arranged on the surface of the package carrier plate is connected with the first strengthening part; moreover, the first strengthening part is arranged outside the second strengthening part.

Description

technical field [0001] The invention relates to a flip-chip packaging structure and a packaging method thereof, in particular to a flip-chip packaging structure with reinforcements and packaging technology. Background technique [0002] In recent years, under the strong demand for electronic products to be light, thin, and small, chip packaging has been developing towards high-speed processing and miniaturization of electronic products. Therefore, high-speed processing and miniaturization are undoubtedly the goals pursued by chip packages. [0003] Based on the above reasons, the flip-chip package came into being. The difference between it and the traditional wire bonding package is that the flip-chip package is to place the surface of the chip with the electronic circuit on the substrate in an upside-down manner, and at the same time electrically connect it with solder bumps. To the substrate, this can effectively reduce the size of the package, and handle high-speed signal...

AI Technical Summary

Problems solved by technology

[0007] However, in the above-mentioned flip-chip packaging structure with stiffeners and its packaging technology in the prior art, the chip and the substrate must be electrically connected through solder bumps, and then the stiffeners are arranged on the substrate, and then filled with primer material. , although this can enhance the cleaning effect of the flux, but it cannot overcome the warpage of the substrate caused by reflow after the chip is mounted on the board

Because the design and configuration of stiffeners in the prior art still lead to packaging problems that cannot be solved, it cannot reduce the poor coplanarity of the flip-chip package, and at the same time, it cannot obtain good assistance in the flip-chip packaging process. Flux cleaning effect, but in the glue pouring process, it cannot effectively combine the primer material with the solder bump, chip and substrate to achieve the effect of protecting the chip

It can be seen that the existing semiconductor packaging technology still has room for further improvement.

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