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Production method for gate oxide layers with different thickness

A technology of gate oxide layer and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., to achieve good quality and improve the effect of substrate surface damage

Active Publication Date: 2009-12-02
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In view of this, the object of the present invention is to provide a method for manufacturing gate oxide layers with different thicknesses, which can solve the known problems caused by the large difference in gate oxide layer thickness, and can improve the film quality of the gate oxide layer

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  • Production method for gate oxide layers with different thickness
  • Production method for gate oxide layers with different thickness
  • Production method for gate oxide layers with different thickness

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Embodiment Construction

[0033] Figure 1A to Figure 1D It is a schematic flowchart of a method for manufacturing gate oxide layers with different thicknesses according to an embodiment of the present invention.

[0034] First, please refer to Figure 1A , providing a substrate 100 with a high voltage element region 102 and a low voltage element region 104 on the substrate 100 . In this embodiment, the high voltage device area 102 is, for example, a device area for operating at 40 volts, and the low voltage device area 104 is, for example, a device area for operating at 3.3 volts.

[0035] Then, please continue to refer to Figure 1A , forming a high voltage gate oxide layer 106 on the substrate 100 . The material of the high voltage gate oxide layer 106 is, for example, silicon oxide, and its formation method is, for example, thermal oxidation, chemical vapor deposition, or other suitable methods. The high voltage gate oxide layer 106 has a thickness of about 850 Angstroms.

[0036] Next, the hig...

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Abstract

The invention discloses a manufacturing method of gate oxide layers with different thicknesses. The method is as follows, a substrate is provided, and the substrate is provided with a high-voltage element region and a low-voltage element region. Then, a high-voltage gate oxide layer is formed on the substrate. After that, a first wet etching process is carried out to remove part of the high-voltage gate oxide layer in the low-voltage element region. Then, a second wet etching process is carried out to remove the residual high-voltage gate oxide layer in the low-voltage element region, wherein, the etching rate of the second wet etching process is less than the etching rate of the first wet etching process. A low-voltage gate oxide layer is then formed on the substrate in the low-voltage element region.

Description

technical field [0001] The invention relates to a method for manufacturing an integrated circuit, and in particular to a method for manufacturing gate oxide layers with different thicknesses. Background technique [0002] In recent years, with the vigorous development of the electronic industry, integrated circuit chips have been widely used. In response to the ever-changing needs of the electronic industry, many semiconductor technologies have also developed rapidly. [0003] In integrated circuit components, different circuits require the close cooperation of different circuit elements with different fundamental operating characteristics. In response to the competitiveness and diversity of circuit components, components with different gate oxide thicknesses must exist on some circuits at the same time to meet the needs of different operating voltages, so multiple gate oxide thicknesses are required. thickness). Generally speaking, components with different voltages, such...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/82H01L21/8234H01L21/84
Inventor 詹淑君陈荣庆王贤愈
Owner UNITED MICROELECTRONICS CORP