Semiconductor memory device

Abstract

A semiconductor memory device can reduce a data writing time. The semiconductor memory device includes a bit line sense amplifier connected to a pair of bit lines. A pair of first local lines id connected to the pair of bit lines by a first switching unit. A pair of second local lines is connected to the pair of first local lines by a second switching unit. A writing driver drives the second local lines using a normal-driving voltage in response to a data signal through a global line. The writing driver drives the second local lines using an over-driving voltage having a higher level than that of the normal-driving voltage during a predetermined period.

Description

[0001] This patent application contains relevant contents of Korean Patent Publications No. KR2005-0091545 and No. KR2006-49003 filed with the Korean Patent Office on September 29, 2005 and May 30, 2006, and all contents thereof are hereby incorporated refer to. technical field [0002] The present invention relates to a semiconductor storage device, in particular to a write driver of the semiconductor storage device. Background technique [0003] figure 1 It is a circuit diagram of a conventional semiconductor memory device. [0004] As shown in the figure, the semiconductor memory device includes a memory cell array 101, a bit line sense amplifier 102, a first connection unit 103, a second connection unit 104, a data bus sense amplifier 105, a write driver 106, and an input / output disk 107. , the first local line SIO / SIOb, the second local line LIO / LIOb, and the global line GIO. The plurality of resistors R1 to R4 are parasitic resistors loaded on the first and second l...

AI Technical Summary

Problems solved by technology

[0017] However, it takes a lot of time for the data signal to transfer from the write driver to the cell memory cell because of the parasitic resistors on the local lines LIO / LIOb and SIO / SIOb

In other words, the data writing time of the semiconductor memory device is too long

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