Apparatus and method for implementing line fault detection of pseudo-wire simulation
A line fault and pseudo-wire simulation technology, applied in multiplexing communication, time-division multiplexing system, transmission monitoring and other directions, can solve the problem of slow fault perception, increased processor burden, and inability to send detection packets frequently, etc. problems, to achieve the effect of shortening business interruption time, shortening fault detection time, and improving fault repair speed
Inactive Publication Date: 2011-09-14
HUAWEI TECH CO LTD
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Problems solved by technology
Since the task of constructing and analyzing the link state control detection protocol message is completed by the processor (CPU) in the device, if trying to shorten the fault detection time, it is necessary to increase the sending speed of the periodic detection message, which will greatly increase Due to the burden of the processor, such periodic detection messages cannot be sent too frequently, and the fault detection speed is slow. Therefore, the fault detection speed of TDM pseudo-wire emulation technology is usually on the second level, and the fault detection speed is relatively slow.
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[0020] In order to make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings.
[0021] The embodiment of the present invention sets up a jitter buffer memory on the device side of the egress side of the packet switching network of the TDM pseudowire to buffer the data packets received from the network side. When the reception of the data packet is interrupted, or the serial number of the data packet occurs Jumping indicates that the link of the TDM pseudo wire is faulty, so that the line fault can be quickly sensed and reported to the system for processing. The system can quickly recover the interrupted service through link switching and other methods. Using the fault detection method of the embodiment of the present invention, the detection time is usually milliseconds. Compared with the prior art, the fault detection tim...
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The invention provides one anti-false artificial circuit test device, which comprises shake buffer memory, shake buffer read needle control circuit, shake buffer status judgment circuit, sequence number legal analysis. The invention provides one relative method, which comprises the following steps: getting shake buffer memory status and the said memory data pack number; when the said shake buffermemory capacity achieves at certain threshold value, then judging whether there is fault. The invention also provides one other method for this fault test.
Description
Technical field [0001] The invention relates to a link fault detection technology, in particular to a device and method for realizing pseudo-wire simulation line fault detection. Background technique [0002] The E1 (European plesiochronous digital series primary group) or T1 (North America and Japan plesiochronous digital series primary group) leased line service provided by traditional telecom operators is a typical time division multiplexing (TDM) leased line service , Its general business application model such as figure 1 As shown, the ADM in the figure is an add / drop multiplexer. The user connects to the synchronous optical network / synchronous digital series (SONET / SDH) synchronous transmission network deployed by the operator through the TDM dedicated line through the ADM. The SONET / SDH bears TDM leased line service data from different users. [0003] With the opening of the telecom service field, new operators enter this field, and they try to use new network technologies...
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IPC IPC(8): H04J3/14H04L12/26H04B17/00
CPCH04L41/06H04J3/14H04L43/0805
Inventor 邹峘浩郭飞才军梁冰
Owner HUAWEI TECH CO LTD