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High reliability digital integrated circuit design method

A digital circuit and design method technology, applied in the direction of electrical digital data processing, calculation, special data processing applications, etc., can solve problems such as unreachable, divided, and lack of fail-safe technology, so as to save production costs and avoid expenses. Effect

Inactive Publication Date: 2008-03-26
BEIHANG UNIV
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Problems solved by technology

[0017] It can be seen that, in addition to converting the digital circuit described by the user into a digital circuit form that can be realized on a physical device, the existing EDA method does not have the ability to automatically implement fail-safe technology in the circuit designed by the user
However, the high-efficiency method of automatically implementing fail-safe technology cannot achieve satisfactory results due to the difficulty of determining the optimal partition granularity and the difficulty of making the most reliable partition.
[0018] Thereby, the purpose of the present invention is to solve the deficiency that existing EDA method and flow process exist in high reliability circuit design

Method used

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Embodiment Construction

[0051] Preferred embodiments of the invention are shown in the drawings. However, this invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0052] The left side of Fig. 1 shows the traditional EDA design flow and the flow of the high-reliability digital circuit design method according to the method of the present invention. The difference between the two can be clearly compared. The design process in the traditional EDA method includes the following steps:

[0053] The designed target circuit 101 is described in a hardware description language. The target circuit can be modeled by using VHDL, Verilog HDL, schematic diagram and other description means. The target circuit being modeled does not contain parts that include fail-safe t...

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Abstract

A design method of high reliability digital circuit, convert netlist into hypergraph after getting netlist documents using traditional EDA design flow, a fine-grained division method based on hypergraph, allow designers describe circuit only through traditional EDA method, and allocate all kinds of fault defense technologies and all kinds of reliability index, namely add specified fault defense technology to the circuit automatically in order to get a digital integrated circuits of high reliability fault-tolerant circuit.

Description

technical field [0001] The invention relates to a digital integrated circuit design method, in particular to an automatic design method for a high-reliability digital integrated circuit. Background technique [0002] It is necessary to study the automatic design method of high reliability digital integrated circuit. At present, the scale of integrated circuits is expanding day by day, and the number of transistors accommodated on a single integrated circuit is increasing. Even functional modules such as processor cores, memory, and DSP cores are integrated into a single chip to form a SOC (System on Chip, System on Chip) ). This leads to an increasing complexity of integrated circuits. According to the basic point of view in the field of fault tolerance, the more complex the system, the lower the reliability. On the other hand, the feature size of integrated circuits presents a decreasing trend, which leads to an increase in the probability of failures such as electromigr...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 周密尚利宏张炯金惠华
Owner BEIHANG UNIV
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