Semiconductor storage apparatus and semiconductor integrated circuit incorporating the same
A technology for storage devices and integrated circuits, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as loss of storage function, and achieve the effects of improving utilization efficiency, suppressing potential fluctuations, and high flexibility
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
no. 1 Embodiment approach
The semiconductor integrated circuit 100 according to the first embodiment of the present invention is preferably an LSI system, and has a power supply line 120, a logic circuit section 401, a memory control section 402, and a semiconductor storage device (hereinafter referred to as a "memory core section") 410 (Refer to Figure 4). The power supply line 120 is maintained at a constant power supply potential VDD, and supplies power to each part in the semiconductor integrated circuit 100. The logic circuit unit 401 is preferably a CPU system, and is connected to each unit in the semiconductor integrated circuit 100 by an internal bus. The logic circuit unit 401 executes various programs (refer to Figure 5 ) To control the operation of each part in the semiconductor integrated circuit 100.
[0012]
The memory control unit 402 is particularly connected to the memory core unit 410 by an internal bus, and is connected to an external memory M arranged outside the semiconductor integrate...
no. 2 Embodiment approach
The semiconductor integrated circuit according to the second embodiment of the present invention has the same structure as the semiconductor integrated circuit 100 according to the first embodiment of the present invention except for the inside of the memory block included in the memory core portion 410. For the details of these same constituent elements, reference is made to the description of the first embodiment and FIG. 4.
[0022]
The memory block 320 preferably has memory cells 301, word lines 110, 112, ..., bit lines 114, 115, 116, ..., selection signal lines 310, and third transistors 302, 303, 304, ... (refer to image 3 ). The memory cells 301 are preferably arranged in a lattice to form a memory cell array. The word lines 110, 112, ... extend laterally (in the row direction of the memory cell array) between the memory cells 301; the bit lines 114, 115, ... extend longitudinally (in the column direction of the memory cell array) between the memory cells 301. The selectio...
no. 3 Embodiment approach
The semiconductor integrated circuit according to the third embodiment of the present invention has the same structure as the semiconductor integrated circuit 100 according to the first embodiment of the present invention except for the selection signal line and the memory core portion 410. For details of these same constituent elements, reference is made to the description of the first embodiment and FIGS. 1 and 4.
[0027]
In the semiconductor integrated circuit according to the third embodiment of the present invention, unlike the semiconductor integrated circuit according to the first embodiment, a register 415 is provided inside the memory core portion 410 (see FIG. 6). Furthermore, instead of the selection signal lines 421, 422, 423, 424 (see FIG. 4) connected between the memory control unit 402 and the memory blocks of the memory core unit 410, the selection of the connection between the register 415 and each memory block Signal lines 431, 432, 433, 434. The memory control ...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More