Reset control chip and method

A technology for monitoring chips and chips, applied in data reset devices, instruments, electrical digital data processing and other directions, can solve the problems of damaged devices, complex circuits, and easy repeated system resets, and achieve the effect of reliable operation.

Active Publication Date: 2008-07-09
ZHUHAI ZHONGHUI MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the auxiliary circuit built by separate devices has defects such as complex circuit, poor stability, large power consumption, and space occupation.
[0005] In addition, the existing watchdog chip does not have a forced reset function. When the working environment

Method used

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  • Reset control chip and method
  • Reset control chip and method

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Example Embodiment

[0024] The present invention will be further described in detail below in conjunction with the drawings and specific embodiments.

[0025] As shown in Figure 1, the reset monitoring chip disclosed in this embodiment includes: a clock signal generation circuit, a dog feed signal detection circuit, a watchdog delay circuit, a power-on delay circuit, a reset signal generation circuit, a comparator A, and a comparator. Device B and AND gate.

[0026] The clock signal generating circuit oscillates to generate a pulse signal, which is input to the counter of the power-on delay circuit and the counter of the watchdog delay circuit. The input terminal of the dog feeding signal detection circuit is connected to the feedback terminal of the system MCU. When the power-on detection signal is high, the dog feeding signal detection circuit is enabled to detect whether the dog feeding signal WDI has flipped, and if there is, the output is clear The zero signal is given to the watchdog delay circ...

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Abstract

The invention relates to a replacement monitoring chip and a replacement monitoring method. When the system is normally electrified, an electrifying delay circuit controls and outputs an electrifying delay reset signal; the reset signal is sent out under the action of a watchdog when the operation exception occurs in the system; when the system trends to power down, a power-failing notifying signal is sent out to lead the power-down notifying signal to keep a certain time interval from completely power-failing, thereby ensuring the data memorizing time when powering down and no reset signal output during the process of powering down. In addition, the invention also provides coercing reset function; when the reference voltage of a working power supply is less than a certain voltage reference value which is set, the coercing reset signal is maintained to lead the system to run stably. In a word, the invention enables the system to run stably and reliably, and process the data in time without losing.

Description

technical field [0001] The invention relates to a reset monitoring chip and a reset monitoring method in electronic information, intelligent control, signal processing and other systems. Background technique [0002] The reset monitoring circuit is the most basic and critical part of the whole system, which is related to the stability and reliability of the whole system operation. At present, many systems use a watchdog reset chip to reset the MCU of the system, such as the MAX706, which can complete the reset when the system is powered on, the reset when the power is turned off, and the abnormal reset during the normal operation of the system. [0003] However, when the existing watchdog reset chip is powered on or powered off, its output terminal directly outputs a reset signal. This method has some defects, mainly manifested in: At a certain level, a reset signal is sent to the MCU. At this time, the MCU of the system may not have entered a stable working state, and the ...

Claims

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Application Information

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IPC IPC(8): G06F11/00G06F1/24
Inventor 史谦唐振中
Owner ZHUHAI ZHONGHUI MICROELECTRONICS
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