Lighting system and method

Abstract

The invention discloses a lighting system and a method. The system includes a programmable logic module for clock sampling and serial output lighting signals to be output in parallel, and synchronously outputting shift signals and latching signals corresponding to the serial output lighting signals; a serial-in / parallel-out shift latching module for converting the serial output lighting signals into parallel signals according to the shift signals and latching signals, utilizing the output parallel signals to light up. The technical proposal of the invention can save logical resources.

Description

technical field [0001] The present invention relates to indicator light display, in particular to a lighting system and method. Background technique [0002] At present, with the development of various technologies, the functions of communication equipment are becoming more and more comprehensive, and the degree of integration is getting higher and higher. For example, communication equipment integrated with functions such as data security, voice communication, video interaction, and service customization appears. Correspondingly, the number of indicator lights serving as auxiliary display devices of communication devices also increases, and the complexity of their display states gradually increases. [0003] In the prior art, the state control of the indicator light is usually realized by parallel lighting of programmable logic chips such as CPLD (Complex Programmable Logic Device, complex programmable logic device) or FPGA (Field Programmable Gate Array, field programmable...

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Problems solved by technology

However, the current programmable logic chips are usually standard parts, and the number of pins is proportional to the size of the logic unit. Therefore, in the case of a certain demand for logic units, in order to realize the state control of more indicator lights, It may be necessary to replace a chip with a larger logic unit to meet the needs of more pins, but this will not only cause a waste of logic resources, but also increase the cost; or, it is also possible to use multiple programmable logic chip to expand the number of pins, but in this case, it will also cause a waste of logic resources and an increase in cost, and due to the increase in communication between chips, it will increase the design complexity of programmable logic chips

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