Operation processing device

A technology for computing processing devices and information processing devices, which is applied in the direction of multi-programming devices, machine execution devices, electrical digital data processing, etc., can solve the problem of increasing hardware resources, and achieve the effect of suppressing the increase of resources

Inactive Publication Date: 2008-10-01
FUJITSU LTD
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  • Abstract
  • Description
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Problems solved by technology

[0017] Therefore, as the recent large-scale symmetrical multi-processor (SMP; SymmetricalMulti-Processor) system and multi-core processor, along with the increase in the number of processors or processor cores that issue mutual calls in the computer system, the instructions in the FIFO are used to communicate with each other. The number of called entries will inevitably increase, so there is a problem of increased hardware resources involved in mutual call control

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  • Operation processing device
  • Operation processing device
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Embodiment Construction

[0057] First, before describing the embodiments of the present invention, the figure 2 The internal operation of XCSC1121 at the time of mutual call sending indicated by arrows (1) to (4) will be described.

[0058] After the mutual call data transmitted from the CPU core unit 1110 is written into the data register, a write request to the BUSY bit is transmitted from the CPU core unit 1110 accompanied by designation of the BN number. According to the request, the BUSY bit of the specified BN number in the status register is set, and the BN number is stored in the command FIFO, and the VLD bit (Valid bit, effective bit) is also set. At this time, the XCSC1121 sends an issuance request of XCALL_REQ (mutual call request) to the coordinator.

[0059] The coordinator is a module that coordinates the priority order of using the bus (signal line) between the CPU core unit 1110 and the SC1300, and performs control so that instructions are issued efficiently and in compliance with th...

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Abstract

The present invention is intended to control the increase in the resources required for controlling internal processor interrupt (cross call) for communication between CPUs of a computer system. A cross call send control unit (XCSC 40) of an external interface unit of each CPU controls cross call transmission issued by a CPU core unit 20 to another CPU. The XCSC 40 has a register 41 for keeping the processing state of the processing relating to the cross call directly associated with an issue history of the cross call for each entry.

Description

technical field [0001] The present invention relates to the internal control technology of CPU and other computing processing devices, in particular to the control technology for mutual calling between computing processing devices. Background technique [0002] The invention relates to the mutual calling among CPUs, and especially takes a multi-CPU system as an object. The mutual call is an internal processor interrupt used by the OS for maintaining storage consistency in the virtual memory, and is a type of communication means between processors. [0003] As a technique related to the present invention, for example, Patent Document 1 discloses a technique in which read separation ( In the read control device of the computer system of the read split) method, the control memory read and the I / O management table are divided separately, thereby preventing the occupation of the read management table caused by the I / O read with a response delay. [0004] In addition, for exampl...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/17
CPCG06F9/4812G06F9/50G06F15/17G06F13/10G06F9/30
Inventor 清水野光宪
Owner FUJITSU LTD
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